diff options
Diffstat (limited to 'tcg/arm/tcg-target.c')
-rw-r--r-- | tcg/arm/tcg-target.c | 61 |
1 files changed, 7 insertions, 54 deletions
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index cf0ca3d0b..737200e5e 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -145,12 +145,6 @@ static void patch_reloc(uint8_t *code_ptr, int type, } } -/* maximum number of register used for input function arguments */ -static inline int tcg_target_get_call_iarg_regs_count(int flags) -{ - return 4; -} - /* parse target specific constraints */ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) { @@ -176,7 +170,7 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) so don't use these. */ tcg_regset_reset_reg(ct->u.regs, TCG_REG_R0); tcg_regset_reset_reg(ct->u.regs, TCG_REG_R1); -#if defined(CONFIG_TCG_PASS_AREG0) && (TARGET_LONG_BITS == 64) +#if TARGET_LONG_BITS == 64 /* If we're passing env to the helper as r0 and need a regpair * for the address then r2 will be overwritten as we're setting * up the args to the helper. @@ -204,8 +198,7 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) use these. */ tcg_regset_reset_reg(ct->u.regs, TCG_REG_R0); tcg_regset_reset_reg(ct->u.regs, TCG_REG_R1); -#if defined(CONFIG_SOFTMMU) && \ - defined(CONFIG_TCG_PASS_AREG0) && (TARGET_LONG_BITS == 64) +#if defined(CONFIG_SOFTMMU) && (TARGET_LONG_BITS == 64) /* Avoid clashes with registers being used for helper args */ tcg_regset_reset_reg(ct->u.regs, TCG_REG_R2); tcg_regset_reset_reg(ct->u.regs, TCG_REG_R3); @@ -223,7 +216,7 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) #ifdef CONFIG_SOFTMMU /* r2 is still needed to load data_reg, so don't use it. */ tcg_regset_reset_reg(ct->u.regs, TCG_REG_R2); -#if defined(CONFIG_TCG_PASS_AREG0) && (TARGET_LONG_BITS == 64) +#if TARGET_LONG_BITS == 64 /* Avoid clashes with registers being used for helper args */ tcg_regset_reset_reg(ct->u.regs, TCG_REG_R3); #endif @@ -342,7 +335,7 @@ enum arm_cond_code_e { COND_AL = 0xe, }; -static const uint8_t tcg_cond_to_arm_cond[10] = { +static const uint8_t tcg_cond_to_arm_cond[] = { [TCG_COND_EQ] = COND_EQ, [TCG_COND_NE] = COND_NE, [TCG_COND_LT] = COND_LT, @@ -954,7 +947,6 @@ static inline void tcg_out_goto_label(TCGContext *s, int cond, int label_index) #include "../../softmmu_defs.h" -#ifdef CONFIG_TCG_PASS_AREG0 /* helper signature: helper_ld_mmu(CPUState *env, target_ulong addr, int mmu_idx) */ static const void * const qemu_ld_helpers[4] = { @@ -972,25 +964,6 @@ static const void * const qemu_st_helpers[4] = { helper_stl_mmu, helper_stq_mmu, }; -#else -/* legacy helper signature: __ld_mmu(target_ulong addr, int - mmu_idx) */ -static void *qemu_ld_helpers[4] = { - __ldb_mmu, - __ldw_mmu, - __ldl_mmu, - __ldq_mmu, -}; - -/* legacy helper signature: __st_mmu(target_ulong addr, uintxx_t val, - int mmu_idx) */ -static void *qemu_st_helpers[4] = { - __stb_mmu, - __stw_mmu, - __stl_mmu, - __stq_mmu, -}; -#endif /* Helper routines for marshalling helper function arguments into * the correct registers and stack. @@ -1203,9 +1176,7 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc) * trash by moving the earlier arguments into them. */ argreg = TCG_REG_R0; -#ifdef CONFIG_TCG_PASS_AREG0 argreg = tcg_out_arg_reg32(s, argreg, TCG_AREG0); -#endif #if TARGET_LONG_BITS == 64 argreg = tcg_out_arg_reg64(s, argreg, addr_reg, addr_reg2); #else @@ -1226,20 +1197,11 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc) case 1: case 2: default: - if (data_reg != TCG_REG_R0) { - tcg_out_dat_reg(s, COND_AL, ARITH_MOV, - data_reg, 0, TCG_REG_R0, SHIFT_IMM_LSL(0)); - } + tcg_out_mov_reg(s, COND_AL, data_reg, TCG_REG_R0); break; case 3: - if (data_reg != TCG_REG_R0) { - tcg_out_dat_reg(s, COND_AL, ARITH_MOV, - data_reg, 0, TCG_REG_R0, SHIFT_IMM_LSL(0)); - } - if (data_reg2 != TCG_REG_R1) { - tcg_out_dat_reg(s, COND_AL, ARITH_MOV, - data_reg2, 0, TCG_REG_R1, SHIFT_IMM_LSL(0)); - } + tcg_out_mov_reg(s, COND_AL, data_reg, TCG_REG_R0); + tcg_out_mov_reg(s, COND_AL, data_reg2, TCG_REG_R1); break; } @@ -1421,9 +1383,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc) * trash by moving the earlier arguments into them. */ argreg = TCG_REG_R0; -#ifdef CONFIG_TCG_PASS_AREG0 argreg = tcg_out_arg_reg32(s, argreg, TCG_AREG0); -#endif #if TARGET_LONG_BITS == 64 argreg = tcg_out_arg_reg64(s, argreg, addr_reg, addr_reg2); #else @@ -1561,12 +1521,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, else tcg_out_callr(s, COND_AL, args[0]); break; - case INDEX_op_jmp: - if (const_args[0]) - tcg_out_goto(s, COND_AL, args[0]); - else - tcg_out_bx(s, COND_AL, args[0]); - break; case INDEX_op_br: tcg_out_goto_label(s, COND_AL, args[0]); break; @@ -1800,7 +1754,6 @@ static const TCGTargetOpDef arm_op_defs[] = { { INDEX_op_exit_tb, { } }, { INDEX_op_goto_tb, { } }, { INDEX_op_call, { "ri" } }, - { INDEX_op_jmp, { "ri" } }, { INDEX_op_br, { } }, { INDEX_op_mov_i32, { "r", "r" } }, |