diff options
Diffstat (limited to 'target-mips/cpu.h')
| -rw-r--r-- | target-mips/cpu.h | 42 |
1 files changed, 28 insertions, 14 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 569f9325b..482f27d1e 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -107,6 +107,8 @@ struct CPUMIPSFPUContext { #define FP_UNIMPLEMENTED 32 }; +#define NB_MMU_MODES 3 + typedef struct CPUMIPSMVPContext CPUMIPSMVPContext; struct CPUMIPSMVPContext { int32_t CP0_MVPControl; @@ -283,8 +285,7 @@ struct CPUMIPSState { #define CP0St_KX 7 #define CP0St_SX 6 #define CP0St_UX 5 -#define CP0St_UM 4 -#define CP0St_R0 3 +#define CP0St_KSU 3 #define CP0St_ERL 2 #define CP0St_EXL 1 #define CP0St_IE 0 @@ -416,9 +417,14 @@ struct CPUMIPSState { /* TMASK defines different execution modes */ #define MIPS_HFLAG_TMASK 0x00FF #define MIPS_HFLAG_MODE 0x0007 /* execution modes */ -#define MIPS_HFLAG_UM 0x0001 /* user mode */ -#define MIPS_HFLAG_DM 0x0002 /* Debug mode */ -#define MIPS_HFLAG_SM 0x0004 /* Supervisor mode */ + /* The KSU flags must be the lowest bits in hflags. The flag order + must be the same as defined for CP0 Status. This allows to use + the bits as the value of mmu_idx. */ +#define MIPS_HFLAG_KSU 0x0003 /* kernel/supervisor/user mode mask */ +#define MIPS_HFLAG_UM 0x0002 /* user mode flag */ +#define MIPS_HFLAG_SM 0x0001 /* supervisor mode flag */ +#define MIPS_HFLAG_KM 0x0000 /* kernel mode flag */ +#define MIPS_HFLAG_DM 0x0004 /* Debug mode */ #define MIPS_HFLAG_64 0x0008 /* 64-bit instructions enabled */ #define MIPS_HFLAG_CP0 0x0010 /* CP0 enabled */ #define MIPS_HFLAG_FPU 0x0020 /* FPU enabled */ @@ -450,12 +456,7 @@ struct CPUMIPSState { CPU_COMMON - int ram_size; - const char *kernel_filename; - const char *kernel_cmdline; - const char *initrd_filename; - - mips_def_t *cpu_model; + const mips_def_t *cpu_model; #ifndef CONFIG_USER_ONLY void *irq[8]; #endif @@ -473,15 +474,28 @@ void r4k_do_tlbwi (void); void r4k_do_tlbwr (void); void r4k_do_tlbp (void); void r4k_do_tlbr (void); -int mips_find_by_name (const unsigned char *name, mips_def_t **def); void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)); -int cpu_mips_register (CPUMIPSState *env, mips_def_t *def); + +void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, + int unused); #define CPUState CPUMIPSState #define cpu_init cpu_mips_init #define cpu_exec cpu_mips_exec #define cpu_gen_code cpu_mips_gen_code #define cpu_signal_handler cpu_mips_signal_handler +#define cpu_list mips_cpu_list + +/* MMU modes definitions. We carefully match the indices with our + hflags layout. */ +#define MMU_MODE0_SUFFIX _kernel +#define MMU_MODE1_SUFFIX _super +#define MMU_MODE2_SUFFIX _user +#define MMU_USER_IDX 2 +static inline int cpu_mmu_index (CPUState *env) +{ + return env->hflags & MIPS_HFLAG_KSU; +} #include "cpu-all.h" @@ -544,7 +558,7 @@ enum { }; int cpu_mips_exec(CPUMIPSState *s); -CPUMIPSState *cpu_mips_init(void); +CPUMIPSState *cpu_mips_init(const char *cpu_model); uint32_t cpu_mips_get_clock (void); int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc); |