diff options
Diffstat (limited to 'hw/sun4u.c')
-rw-r--r-- | hw/sun4u.c | 345 |
1 files changed, 131 insertions, 214 deletions
diff --git a/hw/sun4u.c b/hw/sun4u.c index 0e9e72e35..183f64a5a 100644 --- a/hw/sun4u.c +++ b/hw/sun4u.c @@ -21,20 +21,29 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "vl.h" -#include "m48t59.h" +#include "hw.h" +#include "pci.h" +#include "pc.h" +#include "nvram.h" +#include "fdc.h" +#include "net.h" +#include "qemu-timer.h" +#include "sysemu.h" +#include "boards.h" +#include "firmware_abi.h" #define KERNEL_LOAD_ADDR 0x00404000 #define CMDLINE_ADDR 0x003ff000 #define INITRD_LOAD_ADDR 0x00300000 #define PROM_SIZE_MAX (512 * 1024) -#define PROM_ADDR 0x1fff0000000ULL -#define PROM_VADDR 0x000ffd00000ULL +#define PROM_ADDR 0x1fff0000000ULL +#define PROM_VADDR 0x000ffd00000ULL #define APB_SPECIAL_BASE 0x1fe00000000ULL -#define APB_MEM_BASE 0x1ff00000000ULL -#define VGA_BASE (APB_MEM_BASE + 0x400000ULL) -#define PROM_FILENAME "openbios-sparc64" +#define APB_MEM_BASE 0x1ff00000000ULL +#define VGA_BASE (APB_MEM_BASE + 0x400000ULL) +#define PROM_FILENAME "openbios-sparc64" #define NVRAM_SIZE 0x2000 +#define MAX_IDE_BUS 2 /* TSC handling */ @@ -66,204 +75,91 @@ void DMA_register_channel (int nchan, { } -/* NVRAM helpers */ -void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value) -{ - m48t59_write(nvram, addr, value); -} - -uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr) -{ - return m48t59_read(nvram, addr); -} - -void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value) -{ - m48t59_write(nvram, addr, value >> 8); - m48t59_write(nvram, addr + 1, value & 0xFF); -} - -uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr) -{ - uint16_t tmp; - - tmp = m48t59_read(nvram, addr) << 8; - tmp |= m48t59_read(nvram, addr + 1); - - return tmp; -} - -void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value) -{ - m48t59_write(nvram, addr, value >> 24); - m48t59_write(nvram, addr + 1, (value >> 16) & 0xFF); - m48t59_write(nvram, addr + 2, (value >> 8) & 0xFF); - m48t59_write(nvram, addr + 3, value & 0xFF); -} - -uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr) -{ - uint32_t tmp; - - tmp = m48t59_read(nvram, addr) << 24; - tmp |= m48t59_read(nvram, addr + 1) << 16; - tmp |= m48t59_read(nvram, addr + 2) << 8; - tmp |= m48t59_read(nvram, addr + 3); - - return tmp; -} - -void NVRAM_set_string (m48t59_t *nvram, uint32_t addr, - const unsigned char *str, uint32_t max) -{ - int i; - - for (i = 0; i < max && str[i] != '\0'; i++) { - m48t59_write(nvram, addr + i, str[i]); - } - m48t59_write(nvram, addr + max - 1, '\0'); -} - -int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max) -{ - int i; - - memset(dst, 0, max); - for (i = 0; i < max; i++) { - dst[i] = NVRAM_get_byte(nvram, addr + i); - if (dst[i] == '\0') - break; - } - - return i; -} - -static uint16_t NVRAM_crc_update (uint16_t prev, uint16_t value) -{ - uint16_t tmp; - uint16_t pd, pd1, pd2; - - tmp = prev >> 8; - pd = prev ^ value; - pd1 = pd & 0x000F; - pd2 = ((pd >> 4) & 0x000F) ^ pd1; - tmp ^= (pd1 << 3) | (pd1 << 8); - tmp ^= pd2 | (pd2 << 7) | (pd2 << 12); - - return tmp; -} - -uint16_t NVRAM_compute_crc (m48t59_t *nvram, uint32_t start, uint32_t count) -{ - uint32_t i; - uint16_t crc = 0xFFFF; - int odd; - - odd = count & 1; - count &= ~1; - for (i = 0; i != count; i++) { - crc = NVRAM_crc_update(crc, NVRAM_get_word(nvram, start + i)); - } - if (odd) { - crc = NVRAM_crc_update(crc, NVRAM_get_byte(nvram, start + i) << 8); - } - - return crc; -} - -static uint32_t nvram_set_var (m48t59_t *nvram, uint32_t addr, - const unsigned char *str) -{ - uint32_t len; - - len = strlen(str) + 1; - NVRAM_set_string(nvram, addr, str, len); - - return addr + len; -} - -static void nvram_finish_partition (m48t59_t *nvram, uint32_t start, - uint32_t end) -{ - unsigned int i, sum; - - // Length divided by 16 - m48t59_write(nvram, start + 2, ((end - start) >> 12) & 0xff); - m48t59_write(nvram, start + 3, ((end - start) >> 4) & 0xff); - // Checksum - sum = m48t59_read(nvram, start); - for (i = 0; i < 14; i++) { - sum += m48t59_read(nvram, start + 2 + i); - sum = (sum + ((sum & 0xff00) >> 8)) & 0xff; - } - m48t59_write(nvram, start + 1, sum & 0xff); -} - extern int nographic; -int sun4u_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, - const unsigned char *arch, - uint32_t RAM_size, int boot_device, - uint32_t kernel_image, uint32_t kernel_size, - const char *cmdline, - uint32_t initrd_image, uint32_t initrd_size, - uint32_t NVRAM_image, - int width, int height, int depth) +static int sun4u_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, + const unsigned char *arch, + uint32_t RAM_size, const char *boot_devices, + uint32_t kernel_image, uint32_t kernel_size, + const char *cmdline, + uint32_t initrd_image, uint32_t initrd_size, + uint32_t NVRAM_image, + int width, int height, int depth) { - uint16_t crc; unsigned int i; uint32_t start, end; - - /* Set parameters for Open Hack'Ware BIOS */ - NVRAM_set_string(nvram, 0x00, "QEMU_BIOS", 16); - NVRAM_set_lword(nvram, 0x10, 0x00000002); /* structure v2 */ - NVRAM_set_word(nvram, 0x14, NVRAM_size); - NVRAM_set_string(nvram, 0x20, arch, 16); - NVRAM_set_byte(nvram, 0x2f, nographic & 0xff); - NVRAM_set_lword(nvram, 0x30, RAM_size); - NVRAM_set_byte(nvram, 0x34, boot_device); - NVRAM_set_lword(nvram, 0x38, kernel_image); - NVRAM_set_lword(nvram, 0x3C, kernel_size); + uint8_t image[0x1ff0]; + ohwcfg_v3_t *header = (ohwcfg_v3_t *)ℑ + struct sparc_arch_cfg *sparc_header; + struct OpenBIOS_nvpart_v1 *part_header; + + memset(image, '\0', sizeof(image)); + + // Try to match PPC NVRAM + strcpy(header->struct_ident, "QEMU_BIOS"); + header->struct_version = cpu_to_be32(3); /* structure v3 */ + + header->nvram_size = cpu_to_be16(NVRAM_size); + header->nvram_arch_ptr = cpu_to_be16(sizeof(ohwcfg_v3_t)); + header->nvram_arch_size = cpu_to_be16(sizeof(struct sparc_arch_cfg)); + strcpy(header->arch, arch); + header->nb_cpus = smp_cpus & 0xff; + header->RAM0_base = 0; + header->RAM0_size = cpu_to_be64((uint64_t)RAM_size); + strcpy(header->boot_devices, boot_devices); + header->nboot_devices = strlen(boot_devices) & 0xff; + header->kernel_image = cpu_to_be64((uint64_t)kernel_image); + header->kernel_size = cpu_to_be64((uint64_t)kernel_size); if (cmdline) { - /* XXX: put the cmdline in NVRAM too ? */ strcpy(phys_ram_base + CMDLINE_ADDR, cmdline); - NVRAM_set_lword(nvram, 0x40, CMDLINE_ADDR); - NVRAM_set_lword(nvram, 0x44, strlen(cmdline)); - } else { - NVRAM_set_lword(nvram, 0x40, 0); - NVRAM_set_lword(nvram, 0x44, 0); + header->cmdline = cpu_to_be64((uint64_t)CMDLINE_ADDR); + header->cmdline_size = cpu_to_be64((uint64_t)strlen(cmdline)); } - NVRAM_set_lword(nvram, 0x48, initrd_image); - NVRAM_set_lword(nvram, 0x4C, initrd_size); - NVRAM_set_lword(nvram, 0x50, NVRAM_image); + header->initrd_image = cpu_to_be64((uint64_t)initrd_image); + header->initrd_size = cpu_to_be64((uint64_t)initrd_size); + header->NVRAM_image = cpu_to_be64((uint64_t)NVRAM_image); - NVRAM_set_word(nvram, 0x54, width); - NVRAM_set_word(nvram, 0x56, height); - NVRAM_set_word(nvram, 0x58, depth); - crc = NVRAM_compute_crc(nvram, 0x00, 0xF8); - NVRAM_set_word(nvram, 0xFC, crc); + header->width = cpu_to_be16(width); + header->height = cpu_to_be16(height); + header->depth = cpu_to_be16(depth); + if (nographic) + header->graphic_flags = cpu_to_be16(OHW_GF_NOGRAPHICS); + + header->crc = cpu_to_be16(OHW_compute_crc(header, 0x00, 0xF8)); + + // Architecture specific header + start = sizeof(ohwcfg_v3_t); + sparc_header = (struct sparc_arch_cfg *)&image[start]; + sparc_header->valid = 0; + start += sizeof(struct sparc_arch_cfg); // OpenBIOS nvram variables // Variable partition - start = 256; - m48t59_write(nvram, start, 0x70); - NVRAM_set_string(nvram, start + 4, "system", 12); + part_header = (struct OpenBIOS_nvpart_v1 *)&image[start]; + part_header->signature = OPENBIOS_PART_SYSTEM; + strcpy(part_header->name, "system"); - end = start + 16; + end = start + sizeof(struct OpenBIOS_nvpart_v1); for (i = 0; i < nb_prom_envs; i++) - end = nvram_set_var(nvram, end, prom_envs[i]); + end = OpenBIOS_set_var(image, end, prom_envs[i]); + + // End marker + image[end++] = '\0'; - m48t59_write(nvram, end++ , 0); end = start + ((end - start + 15) & ~15); - nvram_finish_partition(nvram, start, end); + OpenBIOS_finish_partition(part_header, end - start); // free partition start = end; - m48t59_write(nvram, start, 0x7f); - NVRAM_set_string(nvram, start + 4, "free", 12); + part_header = (struct OpenBIOS_nvpart_v1 *)&image[start]; + part_header->signature = OPENBIOS_PART_FREE; + strcpy(part_header->name, "free"); end = 0x1fd0; - nvram_finish_partition(nvram, start, end); + OpenBIOS_finish_partition(part_header, end - start); + + for (i = 0; i < sizeof(image); i++) + m48t59_write(nvram, i, image[i]); return 0; } @@ -331,10 +227,10 @@ static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; static fdctrl_t *floppy_controller; /* Sun4u hardware initialisation */ -static void sun4u_init(int ram_size, int vga_ram_size, int boot_device, - DisplayState *ds, const char **fd_filename, int snapshot, - const char *kernel_filename, const char *kernel_cmdline, - const char *initrd_filename, const char *cpu_model) +static void sun4u_init(int ram_size, int vga_ram_size, + const char *boot_devices, DisplayState *ds, + const char *kernel_filename, const char *kernel_cmdline, + const char *initrd_filename, const char *cpu_model) { CPUState *env; char buf[1024]; @@ -343,22 +239,22 @@ static void sun4u_init(int ram_size, int vga_ram_size, int boot_device, unsigned int i; long prom_offset, initrd_size, kernel_size; PCIBus *pci_bus; - const sparc_def_t *def; QEMUBH *bh; qemu_irq *irq; + int index; + BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; + BlockDriverState *fd[MAX_FD]; linux_boot = (kernel_filename != NULL); /* init CPUs */ if (cpu_model == NULL) cpu_model = "TI UltraSparc II"; - sparc_find_by_name(cpu_model, &def); - if (def == NULL) { + env = cpu_init(cpu_model); + if (!env) { fprintf(stderr, "Unable to find Sparc CPU definition\n"); exit(1); } - env = cpu_init(); - cpu_sparc_register(env, def); bh = qemu_bh_new(tick_irq, env); env->tick = ptimer_init(bh); ptimer_set_period(env->tick, 1ULL); @@ -382,12 +278,14 @@ static void sun4u_init(int ram_size, int vga_ram_size, int boot_device, (PROM_SIZE_MAX + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK, prom_offset | IO_MEM_ROM); - snprintf(buf, sizeof(buf), "%s/%s", bios_dir, PROM_FILENAME); + if (bios_name == NULL) + bios_name = PROM_FILENAME; + snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); ret = load_elf(buf, PROM_ADDR - PROM_VADDR, NULL, NULL, NULL); if (ret < 0) { - fprintf(stderr, "qemu: could not load prom '%s'\n", - buf); - exit(1); + fprintf(stderr, "qemu: could not load prom '%s'\n", + buf); + exit(1); } kernel_size = 0; @@ -396,13 +294,13 @@ static void sun4u_init(int ram_size, int vga_ram_size, int boot_device, /* XXX: put correct offset */ kernel_size = load_elf(kernel_filename, 0, NULL, NULL, NULL); if (kernel_size < 0) - kernel_size = load_aout(kernel_filename, phys_ram_base + KERNEL_LOAD_ADDR); - if (kernel_size < 0) - kernel_size = load_image(kernel_filename, phys_ram_base + KERNEL_LOAD_ADDR); + kernel_size = load_aout(kernel_filename, phys_ram_base + KERNEL_LOAD_ADDR); + if (kernel_size < 0) + kernel_size = load_image(kernel_filename, phys_ram_base + KERNEL_LOAD_ADDR); if (kernel_size < 0) { fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename); - exit(1); + exit(1); } /* load initrd */ @@ -415,14 +313,14 @@ static void sun4u_init(int ram_size, int vga_ram_size, int boot_device, } } if (initrd_size > 0) { - for (i = 0; i < 64 * TARGET_PAGE_SIZE; i += TARGET_PAGE_SIZE) { - if (ldl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i) - == 0x48647253) { // HdrS - stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 16, INITRD_LOAD_ADDR); - stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 20, initrd_size); - break; - } - } + for (i = 0; i < 64 * TARGET_PAGE_SIZE; i += TARGET_PAGE_SIZE) { + if (ldl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i) + == 0x48647253) { // HdrS + stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 16, INITRD_LOAD_ADDR); + stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 20, initrd_size); + break; + } + } } } pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, NULL); @@ -444,17 +342,36 @@ static void sun4u_init(int ram_size, int vga_ram_size, int boot_device, for(i = 0; i < nb_nics; i++) { if (!nd_table[i].model) nd_table[i].model = "ne2k_pci"; - pci_nic_init(pci_bus, &nd_table[i], -1); + pci_nic_init(pci_bus, &nd_table[i], -1); } irq = qemu_allocate_irqs(dummy_cpu_set_irq, NULL, 32); - // XXX pci_cmd646_ide_init(pci_bus, bs_table, 1); - pci_piix3_ide_init(pci_bus, bs_table, -1, irq); + if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) { + fprintf(stderr, "qemu: too many IDE bus\n"); + exit(1); + } + for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) { + index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS); + if (index != -1) + hd[i] = drives_table[index].bdrv; + else + hd[i] = NULL; + } + + // XXX pci_cmd646_ide_init(pci_bus, hd, 1); + pci_piix3_ide_init(pci_bus, hd, -1, irq); /* FIXME: wire up interrupts. */ i8042_init(NULL/*1*/, NULL/*12*/, 0x60); - floppy_controller = fdctrl_init(NULL/*6*/, 2, 0, 0x3f0, fd_table); + for(i = 0; i < MAX_FD; i++) { + index = drive_get_index(IF_FLOPPY, 0, i); + if (index != -1) + fd[i] = drives_table[index].bdrv; + else + fd[i] = NULL; + } + floppy_controller = fdctrl_init(NULL/*6*/, 2, 0, 0x3f0, fd); nvram = m48t59_init(NULL/*8*/, 0, 0x0074, NVRAM_SIZE, 59); - sun4u_NVRAM_set_params(nvram, NVRAM_SIZE, "Sun4u", ram_size, boot_device, + sun4u_NVRAM_set_params(nvram, NVRAM_SIZE, "Sun4u", ram_size, boot_devices, KERNEL_LOAD_ADDR, kernel_size, kernel_cmdline, INITRD_LOAD_ADDR, initrd_size, |