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Diffstat (limited to 'hw/slavio_intctl.c')
-rw-r--r--hw/slavio_intctl.c85
1 files changed, 47 insertions, 38 deletions
diff --git a/hw/slavio_intctl.c b/hw/slavio_intctl.c
index f604702f8..a0aa53c21 100644
--- a/hw/slavio_intctl.c
+++ b/hw/slavio_intctl.c
@@ -21,7 +21,10 @@
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
-#include "vl.h"
+#include "hw.h"
+#include "sun4m.h"
+#include "console.h"
+
//#define DEBUG_IRQ_COUNT
//#define DEBUG_IRQ
@@ -65,6 +68,12 @@ typedef struct SLAVIO_INTCTLState {
#define INTCTLM_MAXADDR 0x13
#define INTCTLM_SIZE (INTCTLM_MAXADDR + 1)
#define INTCTLM_MASK 0x1f
+#define MASTER_IRQ_MASK ~0x4fb2007f
+#define MASTER_DISABLE 0x80000000
+#define CPU_IRQ_MASK 0xfffe0000
+#define CPU_IRQ_INT15_IN 0x0004000
+#define CPU_IRQ_INT15_MASK 0x80000000
+
static void slavio_check_interrupts(void *opaque);
// per-cpu interrupt controller
@@ -100,21 +109,21 @@ static void slavio_intctl_mem_writel(void *opaque, target_phys_addr_t addr, uint
DPRINTF("write cpu %d reg 0x" TARGET_FMT_plx " = %x\n", cpu, addr, val);
switch (saddr) {
case 1: // clear pending softints
- if (val & 0x4000)
- val |= 80000000;
- val &= 0xfffe0000;
- s->intreg_pending[cpu] &= ~val;
+ if (val & CPU_IRQ_INT15_IN)
+ val |= CPU_IRQ_INT15_MASK;
+ val &= CPU_IRQ_MASK;
+ s->intreg_pending[cpu] &= ~val;
slavio_check_interrupts(s);
- DPRINTF("Cleared cpu %d irq mask %x, curmask %x\n", cpu, val, s->intreg_pending[cpu]);
- break;
+ DPRINTF("Cleared cpu %d irq mask %x, curmask %x\n", cpu, val, s->intreg_pending[cpu]);
+ break;
case 2: // set softint
- val &= 0xfffe0000;
- s->intreg_pending[cpu] |= val;
+ val &= CPU_IRQ_MASK;
+ s->intreg_pending[cpu] |= val;
slavio_check_interrupts(s);
- DPRINTF("Set cpu %d irq mask %x, curmask %x\n", cpu, val, s->intreg_pending[cpu]);
- break;
+ DPRINTF("Set cpu %d irq mask %x, curmask %x\n", cpu, val, s->intreg_pending[cpu]);
+ break;
default:
- break;
+ break;
}
}
@@ -139,7 +148,7 @@ static uint32_t slavio_intctlm_mem_readl(void *opaque, target_phys_addr_t addr)
saddr = (addr & INTCTLM_MAXADDR) >> 2;
switch (saddr) {
case 0:
- ret = s->intregm_pending & 0x7fffffff;
+ ret = s->intregm_pending & ~MASTER_DISABLE;
break;
case 1:
ret = s->intregm_disabled;
@@ -165,27 +174,27 @@ static void slavio_intctlm_mem_writel(void *opaque, target_phys_addr_t addr, uin
DPRINTF("write system reg 0x" TARGET_FMT_plx " = %x\n", addr, val);
switch (saddr) {
case 2: // clear (enable)
- // Force clear unused bits
- val &= ~0x4fb2007f;
- s->intregm_disabled &= ~val;
- DPRINTF("Enabled master irq mask %x, curmask %x\n", val, s->intregm_disabled);
- slavio_check_interrupts(s);
- break;
+ // Force clear unused bits
+ val &= MASTER_IRQ_MASK;
+ s->intregm_disabled &= ~val;
+ DPRINTF("Enabled master irq mask %x, curmask %x\n", val, s->intregm_disabled);
+ slavio_check_interrupts(s);
+ break;
case 3: // set (disable, clear pending)
- // Force clear unused bits
- val &= ~0x4fb2007f;
- s->intregm_disabled |= val;
- s->intregm_pending &= ~val;
+ // Force clear unused bits
+ val &= MASTER_IRQ_MASK;
+ s->intregm_disabled |= val;
+ s->intregm_pending &= ~val;
slavio_check_interrupts(s);
- DPRINTF("Disabled master irq mask %x, curmask %x\n", val, s->intregm_disabled);
- break;
+ DPRINTF("Disabled master irq mask %x, curmask %x\n", val, s->intregm_disabled);
+ break;
case 4:
- s->target_cpu = val & (MAX_CPUS - 1);
+ s->target_cpu = val & (MAX_CPUS - 1);
slavio_check_interrupts(s);
- DPRINTF("Set master irq cpu %d\n", s->target_cpu);
- break;
+ DPRINTF("Set master irq cpu %d\n", s->target_cpu);
+ break;
default:
- break;
+ break;
}
}
@@ -207,7 +216,7 @@ void slavio_pic_info(void *opaque)
int i;
for (i = 0; i < MAX_CPUS; i++) {
- term_printf("per-cpu %d: pending 0x%08x\n", i, s->intreg_pending[i]);
+ term_printf("per-cpu %d: pending 0x%08x\n", i, s->intreg_pending[i]);
}
term_printf("master: pending 0x%08x, disabled 0x%08x\n", s->intregm_pending, s->intregm_disabled);
}
@@ -241,14 +250,14 @@ static void slavio_check_interrupts(void *opaque)
DPRINTF("pending %x disabled %x\n", pending, s->intregm_disabled);
for (i = 0; i < MAX_CPUS; i++) {
pil_pending = 0;
- if (pending && !(s->intregm_disabled & 0x80000000) &&
+ if (pending && !(s->intregm_disabled & MASTER_DISABLE) &&
(i == s->target_cpu)) {
for (j = 0; j < 32; j++) {
if (pending & (1 << j))
pil_pending |= 1 << s->intbit_to_level[j];
}
}
- pil_pending |= (s->intreg_pending[i] >> 16) & 0xfffe;
+ pil_pending |= (s->intreg_pending[i] & CPU_IRQ_MASK) >> 16;
for (j = 0; j < MAX_PILS; j++) {
if (pil_pending & (1 << j)) {
@@ -310,7 +319,7 @@ static void slavio_intctl_save(QEMUFile *f, void *opaque)
int i;
for (i = 0; i < MAX_CPUS; i++) {
- qemu_put_be32s(f, &s->intreg_pending[i]);
+ qemu_put_be32s(f, &s->intreg_pending[i]);
}
qemu_put_be32s(f, &s->intregm_pending);
qemu_put_be32s(f, &s->intregm_disabled);
@@ -326,7 +335,7 @@ static int slavio_intctl_load(QEMUFile *f, void *opaque, int version_id)
return -EINVAL;
for (i = 0; i < MAX_CPUS; i++) {
- qemu_get_be32s(f, &s->intreg_pending[i]);
+ qemu_get_be32s(f, &s->intreg_pending[i]);
}
qemu_get_be32s(f, &s->intregm_pending);
qemu_get_be32s(f, &s->intregm_disabled);
@@ -341,9 +350,9 @@ static void slavio_intctl_reset(void *opaque)
int i;
for (i = 0; i < MAX_CPUS; i++) {
- s->intreg_pending[i] = 0;
+ s->intreg_pending[i] = 0;
}
- s->intregm_disabled = ~0xffb2007f;
+ s->intregm_disabled = ~MASTER_IRQ_MASK;
s->intregm_pending = 0;
s->target_cpu = 0;
slavio_check_interrupts(s);
@@ -363,8 +372,8 @@ void *slavio_intctl_init(target_phys_addr_t addr, target_phys_addr_t addrg,
s->intbit_to_level = intbit_to_level;
for (i = 0; i < MAX_CPUS; i++) {
- slavio_intctl_io_memory = cpu_register_io_memory(0, slavio_intctl_mem_read, slavio_intctl_mem_write, s);
- cpu_register_physical_memory(addr + i * TARGET_PAGE_SIZE, INTCTL_SIZE,
+ slavio_intctl_io_memory = cpu_register_io_memory(0, slavio_intctl_mem_read, slavio_intctl_mem_write, s);
+ cpu_register_physical_memory(addr + i * TARGET_PAGE_SIZE, INTCTL_SIZE,
slavio_intctl_io_memory);
s->cpu_irqs[i] = parent_irq[i];
}