diff options
Diffstat (limited to 'hw/piix_pci.c')
| -rw-r--r-- | hw/piix_pci.c | 50 |
1 files changed, 19 insertions, 31 deletions
diff --git a/hw/piix_pci.c b/hw/piix_pci.c index 8c00f0d13..d5c7e1e5c 100644 --- a/hw/piix_pci.c +++ b/hw/piix_pci.c @@ -22,7 +22,10 @@ * THE SOFTWARE. */ -#include "vl.h" +#include "hw.h" +#include "pc.h" +#include "pci.h" + typedef uint32_t pci_addr_t; #include "pci_host.h" @@ -54,6 +57,7 @@ static int pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num) static uint32_t isa_page_descs[384 / 4]; static uint8_t smm_enabled; +static int pci_irq_levels[4]; static void update_pam(PCIDevice *d, uint32_t start, uint32_t end, int r) { @@ -136,22 +140,32 @@ static void i440fx_write_config(PCIDevice *d, static void i440fx_save(QEMUFile* f, void *opaque) { PCIDevice *d = opaque; + int i; + pci_device_save(d, f); qemu_put_8s(f, &smm_enabled); + + for (i = 0; i < 4; i++) + qemu_put_be32(f, pci_irq_levels[i]); } static int i440fx_load(QEMUFile* f, void *opaque, int version_id) { PCIDevice *d = opaque; - int ret; + int ret, i; - if (version_id != 1) + if (version_id > 2) return -EINVAL; ret = pci_device_load(d, f); if (ret < 0) return ret; i440fx_update_memory_mappings(d); qemu_get_8s(f, &smm_enabled); + + if (version_id >= 2) + for (i = 0; i < 4; i++) + pci_irq_levels[i] = qemu_get_be32(f); + return 0; } @@ -189,7 +203,7 @@ PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic) d->config[0x72] = 0x02; /* SMRAM */ - register_savevm("I440FX", 0, 1, i440fx_save, i440fx_load, d); + register_savevm("I440FX", 0, 2, i440fx_save, i440fx_load, d); *pi440fx_state = d; return b; } @@ -202,12 +216,11 @@ PCIDevice *piix4_dev; /* just used for simpler irq handling. */ #define PCI_IRQ_WORDS ((PCI_DEVICES_MAX + 31) / 32) -static int pci_irq_levels[4]; - static void piix3_set_irq(qemu_irq *pic, int irq_num, int level) { int i, pic_irq, pic_level; + piix3_dev->config[0x60 + irq_num] &= ~0x80; // enable bit pci_irq_levels[irq_num] = level; /* now we change the pic irq level according to the piix irq mappings */ @@ -310,31 +323,6 @@ static int piix_load(QEMUFile* f, void *opaque, int version_id) return pci_device_load(d, f); } -int piix_init(PCIBus *bus, int devfn) -{ - PCIDevice *d; - uint8_t *pci_conf; - - d = pci_register_device(bus, "PIIX", sizeof(PCIDevice), - devfn, NULL, NULL); - register_savevm("PIIX", 0, 2, piix_save, piix_load, d); - - piix3_dev = d; - pci_conf = d->config; - - pci_conf[0x00] = 0x86; // Intel - pci_conf[0x01] = 0x80; - pci_conf[0x02] = 0x2E; // 82371FB PIIX PCI-to-ISA bridge - pci_conf[0x03] = 0x12; - pci_conf[0x08] = 0x02; // Step A1 - pci_conf[0x0a] = 0x01; // class_sub = PCI_ISA - pci_conf[0x0b] = 0x06; // class_base = PCI_bridge - pci_conf[0x0e] = 0x80; // header_type = PCI_multifunction, generic - - piix3_reset(d); - return d->devfn; -} - int piix3_init(PCIBus *bus, int devfn) { PCIDevice *d; |