aboutsummaryrefslogtreecommitdiff
path: root/hw/parallel.c
diff options
context:
space:
mode:
Diffstat (limited to 'hw/parallel.c')
-rw-r--r--hw/parallel.c27
1 files changed, 12 insertions, 15 deletions
diff --git a/hw/parallel.c b/hw/parallel.c
index 8494d94f6..c4c5dbee5 100644
--- a/hw/parallel.c
+++ b/hw/parallel.c
@@ -65,6 +65,7 @@
#define PARA_CTR_SIGNAL (PARA_CTR_SELECT|PARA_CTR_INIT|PARA_CTR_AUTOLF|PARA_CTR_STROBE)
typedef struct ParallelState {
+ MemoryRegion iomem;
uint8_t dataw;
uint8_t datar;
uint8_t status;
@@ -555,24 +556,20 @@ static void parallel_mm_writel (void *opaque,
parallel_ioport_write_sw(s, addr >> s->it_shift, value);
}
-static CPUReadMemoryFunc * const parallel_mm_read_sw[] = {
- &parallel_mm_readb,
- &parallel_mm_readw,
- &parallel_mm_readl,
-};
-
-static CPUWriteMemoryFunc * const parallel_mm_write_sw[] = {
- &parallel_mm_writeb,
- &parallel_mm_writew,
- &parallel_mm_writel,
+static const MemoryRegionOps parallel_mm_ops = {
+ .old_mmio = {
+ .read = { parallel_mm_readb, parallel_mm_readw, parallel_mm_readl },
+ .write = { parallel_mm_writeb, parallel_mm_writew, parallel_mm_writel },
+ },
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
/* If fd is zero, it means that the parallel device uses the console */
-bool parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
+bool parallel_mm_init(MemoryRegion *address_space,
+ target_phys_addr_t base, int it_shift, qemu_irq irq,
CharDriverState *chr)
{
ParallelState *s;
- int io_sw;
s = g_malloc0(sizeof(ParallelState));
s->irq = irq;
@@ -580,9 +577,9 @@ bool parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
s->it_shift = it_shift;
qemu_register_reset(parallel_reset, s);
- io_sw = cpu_register_io_memory(parallel_mm_read_sw, parallel_mm_write_sw,
- s, DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(base, 8 << it_shift, io_sw);
+ memory_region_init_io(&s->iomem, &parallel_mm_ops, s,
+ "parallel", 8 << it_shift);
+ memory_region_add_subregion(address_space, base, &s->iomem);
return true;
}