diff options
Diffstat (limited to 'cpu-defs.h')
| -rw-r--r-- | cpu-defs.h | 19 |
1 files changed, 8 insertions, 11 deletions
diff --git a/cpu-defs.h b/cpu-defs.h index 915877617..5e0f04674 100644 --- a/cpu-defs.h +++ b/cpu-defs.h @@ -20,6 +20,10 @@ #ifndef CPU_DEFS_H #define CPU_DEFS_H +#ifndef NEED_CPU_H +#error cpu.h included from common code +#endif + #include "config.h" #include <setjmp.h> #include <inttypes.h> @@ -112,15 +116,6 @@ typedef struct CPUTLBEntry { target_phys_addr_t addend; } CPUTLBEntry; -/* Alpha has 4 different running levels */ -#if defined(TARGET_ALPHA) -#define NB_MMU_MODES 4 -#elif defined(TARGET_PPC64H) /* PowerPC 64 with hypervisor mode support */ -#define NB_MMU_MODES 3 -#else -#define NB_MMU_MODES 2 -#endif - #define CPU_COMMON \ struct TranslationBlock *current_tb; /* currently executing TB */ \ /* soft mmu support */ \ @@ -131,7 +126,7 @@ typedef struct CPUTLBEntry { written */ \ target_ulong mem_write_vaddr; /* target virtual addr at which the \ memory was written */ \ - /* 0 = kernel, 1 = user */ \ + /* The meaning of the MMU modes is defined in the target code. */ \ CPUTLBEntry tlb_table[NB_MMU_MODES][CPU_TLB_SIZE]; \ struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \ \ @@ -151,6 +146,8 @@ typedef struct CPUTLBEntry { void *next_cpu; /* next CPU sharing TB cache */ \ int cpu_index; /* CPU index (informative) */ \ /* user data */ \ - void *opaque; + void *opaque; \ + \ + const char *cpu_model_str; #endif |