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| author |   Marcelo Tosatti <mtosatti@redhat.com> | 2012-10-11 04:55:31 -0300 |
|---|---|---|
| committer | Marcelo Tosatti <mtosatti@redhat.com> | 2012-10-11 04:55:31 -0300 |
| commit | 8ed1d2756d3347c2b021748d8c272ff650f57dd0 (patch) | |
| tree | af8f50be8e69de7b4fce9d9ec8d8ef144acf3b08 /tcg/tci/tcg-target.c | |
| parent | 6b414d9fb86527118f3ddb81a1d1a684b3548a9d (diff) | |
| parent | 121afa9e0c02617c2a774996512e4f85f3e93da8 (diff) | |
Merge commit '121afa9e0c02617c2a774996512e4f85f3e93da8' into upstream-merge
* commit '121afa9e0c02617c2a774996512e4f85f3e93da8': (85 commits)
Revert "Add ability to disable build of all targets"
cpu_physical_memory_write_rom() needs to do TB invalidates
qemu-char: BUGFIX, don't call FD_ISSET with negative fd
Revert 455aa1e08 and c3767ed0eb
pc: Drop practically unused BOCHS BIOS debug ports
add -machine mem-merge=on|off option
Remove unused CONFIG_TCG_PASS_AREG0 and dead code
target-mips: switch to AREG0 free mode
target-sh4: switch to AREG0 free mode
target-cris: Switch to AREG0 free mode
target-cris: Avoid AREG0 for helpers
target-microblaze: switch to AREG0 free mode
target-arm: final conversion to AREG0 free mode
target-arm: convert remaining helpers
target-arm: convert void helpers
target-unicore32: switch to AREG0 free mode
target-m68k: avoid using cpu_single_env
target-m68k: switch to AREG0 free mode
target-lm32: switch to AREG0 free mode
target-s390x: avoid cpu_single_env
...
Conflicts:
configure
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Diffstat (limited to 'tcg/tci/tcg-target.c')
| -rw-r--r-- | tcg/tci/tcg-target.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/tcg/tci/tcg-target.c b/tcg/tci/tcg-target.c index ef8580fc8..003244cb0 100644 --- a/tcg/tci/tcg-target.c +++ b/tcg/tci/tcg-target.c @@ -798,9 +798,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, case INDEX_op_qemu_st8: case INDEX_op_qemu_st16: case INDEX_op_qemu_st32: -#ifdef CONFIG_TCG_PASS_AREG0 tcg_out_r(s, TCG_AREG0); -#endif tcg_out_r(s, *args++); tcg_out_r(s, *args++); #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS @@ -811,9 +809,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, #endif break; case INDEX_op_qemu_st64: -#ifdef CONFIG_TCG_PASS_AREG0 tcg_out_r(s, TCG_AREG0); -#endif tcg_out_r(s, *args++); #if TCG_TARGET_REG_BITS == 32 tcg_out_r(s, *args++); |