diff options
| author |   Marcelo Tosatti <mtosatti@redhat.com> | 2012-10-11 05:27:15 -0300 |
|---|---|---|
| committer | Marcelo Tosatti <mtosatti@redhat.com> | 2012-10-11 05:27:15 -0300 |
| commit | 4d9367b76f71c6d938cf8201392abe4bfb1136cb (patch) | |
| tree | 93a31afc3151c19e4906aed6748e842d8431fb02 /tcg/tci/tcg-target.c | |
| parent | 6b414d9fb86527118f3ddb81a1d1a684b3548a9d (diff) | |
| parent | 8e65440d5f64435c003d32088757f702b86af9b4 (diff) | |
* upstream-merge: (575 commits)
ssi: Add slave autoconnect helper
MAINTAINERS: Added maintainerships for SSI
xilinx_zynq: Added SPI controllers + flashes
xilinx_spips: Xilinx Zynq SPI cntrlr device model
petalogix-ml605: added SPI controller with n25q128
xilinx_spi: Initial impl. of Xilinx SPI controller
m25p80: Initial implementation of SPI flash device
hw: Added generic FIFO API.
stellaris: Removed SSI mux
qdev: allow multiple qdev_init_gpio_in() calls
ssi: Added create_slave_no_init()
ssi: Implemented CS behaviour
ssi: Support for multiple attached devices
qemu-barrier: Fix compilation on i386 hosts
target-sparc: Optimize conditionals using SUBCC
target-sparc: Fall through from not-taken trap
target-sparc: Cleanup "global" temporary allocation
target-sparc: Use movcond for FMOV*R
target-sparc: Use movcond in mulscc
target-sparc: Move taddcctv and tsubcctv out of line
...
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Diffstat (limited to 'tcg/tci/tcg-target.c')
| -rw-r--r-- | tcg/tci/tcg-target.c | 24 |
1 files changed, 5 insertions, 19 deletions
diff --git a/tcg/tci/tcg-target.c b/tcg/tci/tcg-target.c index ef8580fc8..e93074083 100644 --- a/tcg/tci/tcg-target.c +++ b/tcg/tci/tcg-target.c @@ -69,7 +69,6 @@ static const TCGTargetOpDef tcg_target_op_defs[] = { { INDEX_op_exit_tb, { NULL } }, { INDEX_op_goto_tb, { NULL } }, { INDEX_op_call, { RI } }, - { INDEX_op_jmp, { RI } }, { INDEX_op_br, { NULL } }, { INDEX_op_mov_i32, { R, R } }, @@ -300,7 +299,7 @@ static const int tcg_target_reg_alloc_order[] = { #endif }; -#if MAX_OPC_PARAM_IARGS != 4 +#if MAX_OPC_PARAM_IARGS != 5 # error Fix needed, number of supported input arguments changed! #endif @@ -309,16 +308,18 @@ static const int tcg_target_call_iarg_regs[] = { TCG_REG_R1, TCG_REG_R2, TCG_REG_R3, -#if TCG_TARGET_REG_BITS == 32 - /* 32 bit hosts need 2 * MAX_OPC_PARAM_IARGS registers. */ #if 0 /* used for TCG_REG_CALL_STACK */ TCG_REG_R4, #endif TCG_REG_R5, +#if TCG_TARGET_REG_BITS == 32 + /* 32 bit hosts need 2 * MAX_OPC_PARAM_IARGS registers. */ TCG_REG_R6, TCG_REG_R7, #if TCG_TARGET_NB_REGS >= 16 TCG_REG_R8, + TCG_REG_R9, + TCG_REG_R10, #else # error Too few input registers available #endif @@ -581,9 +582,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, case INDEX_op_call: tcg_out_ri(s, const_args[0], args[0]); break; - case INDEX_op_jmp: - TODO(); - break; case INDEX_op_setcond_i32: tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); @@ -798,9 +796,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, case INDEX_op_qemu_st8: case INDEX_op_qemu_st16: case INDEX_op_qemu_st32: -#ifdef CONFIG_TCG_PASS_AREG0 - tcg_out_r(s, TCG_AREG0); -#endif tcg_out_r(s, *args++); tcg_out_r(s, *args++); #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS @@ -811,9 +806,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, #endif break; case INDEX_op_qemu_st64: -#ifdef CONFIG_TCG_PASS_AREG0 - tcg_out_r(s, TCG_AREG0); -#endif tcg_out_r(s, *args++); #if TCG_TARGET_REG_BITS == 32 tcg_out_r(s, *args++); @@ -867,12 +859,6 @@ static int tcg_target_const_match(tcg_target_long val, return arg_ct->ct & TCG_CT_CONST; } -/* Maximum number of register used for input function arguments. */ -static int tcg_target_get_call_iarg_regs_count(int flags) -{ - return ARRAY_SIZE(tcg_target_call_iarg_regs); -} - static void tcg_target_init(TCGContext *s) { #if defined(CONFIG_DEBUG_TCG_INTERPRETER) |