diff options
| author |   Marcelo Tosatti <mtosatti@redhat.com> | 2012-10-11 05:27:15 -0300 |
|---|---|---|
| committer | Marcelo Tosatti <mtosatti@redhat.com> | 2012-10-11 05:27:15 -0300 |
| commit | 4d9367b76f71c6d938cf8201392abe4bfb1136cb (patch) | |
| tree | 93a31afc3151c19e4906aed6748e842d8431fb02 /tcg/tcg-opc.h | |
| parent | 6b414d9fb86527118f3ddb81a1d1a684b3548a9d (diff) | |
| parent | 8e65440d5f64435c003d32088757f702b86af9b4 (diff) | |
* upstream-merge: (575 commits)
ssi: Add slave autoconnect helper
MAINTAINERS: Added maintainerships for SSI
xilinx_zynq: Added SPI controllers + flashes
xilinx_spips: Xilinx Zynq SPI cntrlr device model
petalogix-ml605: added SPI controller with n25q128
xilinx_spi: Initial impl. of Xilinx SPI controller
m25p80: Initial implementation of SPI flash device
hw: Added generic FIFO API.
stellaris: Removed SSI mux
qdev: allow multiple qdev_init_gpio_in() calls
ssi: Added create_slave_no_init()
ssi: Implemented CS behaviour
ssi: Support for multiple attached devices
qemu-barrier: Fix compilation on i386 hosts
target-sparc: Optimize conditionals using SUBCC
target-sparc: Fall through from not-taken trap
target-sparc: Cleanup "global" temporary allocation
target-sparc: Use movcond for FMOV*R
target-sparc: Use movcond in mulscc
target-sparc: Move taddcctv and tsubcctv out of line
...
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Diffstat (limited to 'tcg/tcg-opc.h')
| -rw-r--r-- | tcg/tcg-opc.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h index 8e06d03b1..04cb7ca03 100644 --- a/tcg/tcg-opc.h +++ b/tcg/tcg-opc.h @@ -36,9 +36,8 @@ DEF(nopn, 0, 0, 1, 0) /* variable number of parameters */ DEF(discard, 1, 0, 0, 0) -DEF(set_label, 0, 0, 1, 0) +DEF(set_label, 0, 0, 1, TCG_OPF_BB_END) DEF(call, 0, 1, 2, TCG_OPF_SIDE_EFFECTS) /* variable number of parameters */ -DEF(jmp, 0, 1, 0, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS) DEF(br, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS) #define IMPL(X) (X ? 0 : TCG_OPF_NOT_PRESENT) @@ -51,6 +50,7 @@ DEF(br, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS) DEF(mov_i32, 1, 1, 0, 0) DEF(movi_i32, 1, 0, 1, 0) DEF(setcond_i32, 1, 2, 1, 0) +DEF(movcond_i32, 1, 4, 1, IMPL(TCG_TARGET_HAS_movcond_i32)) /* load/store */ DEF(ld8u_i32, 1, 1, 1, 0) DEF(ld8s_i32, 1, 1, 1, 0) @@ -107,6 +107,7 @@ DEF(nor_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_nor_i32)) DEF(mov_i64, 1, 1, 0, IMPL64) DEF(movi_i64, 1, 0, 1, IMPL64) DEF(setcond_i64, 1, 2, 1, IMPL64) +DEF(movcond_i64, 1, 4, 1, IMPL64 | IMPL(TCG_TARGET_HAS_movcond_i64)) /* load/store */ DEF(ld8u_i64, 1, 1, 1, IMPL64) DEF(ld8s_i64, 1, 1, 1, IMPL64) |