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author | Marcelo Tosatti <mtosatti@redhat.com> | 2012-10-11 04:55:31 -0300 |
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committer | Marcelo Tosatti <mtosatti@redhat.com> | 2012-10-11 04:55:31 -0300 |
commit | 8ed1d2756d3347c2b021748d8c272ff650f57dd0 (patch) | |
tree | af8f50be8e69de7b4fce9d9ec8d8ef144acf3b08 /tcg/ppc/tcg-target.c | |
parent | 6b414d9fb86527118f3ddb81a1d1a684b3548a9d (diff) | |
parent | 121afa9e0c02617c2a774996512e4f85f3e93da8 (diff) |
Merge commit '121afa9e0c02617c2a774996512e4f85f3e93da8' into upstream-merge
* commit '121afa9e0c02617c2a774996512e4f85f3e93da8': (85 commits)
Revert "Add ability to disable build of all targets"
cpu_physical_memory_write_rom() needs to do TB invalidates
qemu-char: BUGFIX, don't call FD_ISSET with negative fd
Revert 455aa1e08 and c3767ed0eb
pc: Drop practically unused BOCHS BIOS debug ports
add -machine mem-merge=on|off option
Remove unused CONFIG_TCG_PASS_AREG0 and dead code
target-mips: switch to AREG0 free mode
target-sh4: switch to AREG0 free mode
target-cris: Switch to AREG0 free mode
target-cris: Avoid AREG0 for helpers
target-microblaze: switch to AREG0 free mode
target-arm: final conversion to AREG0 free mode
target-arm: convert remaining helpers
target-arm: convert void helpers
target-unicore32: switch to AREG0 free mode
target-m68k: avoid using cpu_single_env
target-m68k: switch to AREG0 free mode
target-lm32: switch to AREG0 free mode
target-s390x: avoid cpu_single_env
...
Conflicts:
configure
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Diffstat (limited to 'tcg/ppc/tcg-target.c')
-rw-r--r-- | tcg/ppc/tcg-target.c | 38 |
1 files changed, 0 insertions, 38 deletions
diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c index 0cff18125..26c4b33e6 100644 --- a/tcg/ppc/tcg-target.c +++ b/tcg/ppc/tcg-target.c @@ -248,7 +248,6 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) tcg_regset_set32(ct->u.regs, 0, 0xffffffff); tcg_regset_reset_reg(ct->u.regs, TCG_REG_R3); tcg_regset_reset_reg(ct->u.regs, TCG_REG_R4); -#ifdef CONFIG_TCG_PASS_AREG0 tcg_regset_reset_reg(ct->u.regs, TCG_REG_R5); #if TARGET_LONG_BITS == 64 tcg_regset_reset_reg(ct->u.regs, TCG_REG_R6); @@ -256,11 +255,6 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) tcg_regset_reset_reg(ct->u.regs, TCG_REG_R7); #endif #endif -#else /* !AREG0 */ -#if TARGET_LONG_BITS == 64 - tcg_regset_reset_reg(ct->u.regs, TCG_REG_R5); -#endif -#endif break; case 'K': /* qemu_st[8..32] constraint */ ct->ct |= TCG_CT_REG; @@ -268,7 +262,6 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) tcg_regset_reset_reg(ct->u.regs, TCG_REG_R3); tcg_regset_reset_reg(ct->u.regs, TCG_REG_R4); tcg_regset_reset_reg(ct->u.regs, TCG_REG_R5); -#ifdef CONFIG_TCG_PASS_AREG0 tcg_regset_reset_reg(ct->u.regs, TCG_REG_R6); #if TARGET_LONG_BITS == 64 tcg_regset_reset_reg(ct->u.regs, TCG_REG_R7); @@ -276,11 +269,6 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) tcg_regset_reset_reg(ct->u.regs, TCG_REG_R8); #endif #endif -#else /* !AREG0 */ -#if TARGET_LONG_BITS == 64 - tcg_regset_reset_reg(ct->u.regs, TCG_REG_R6); -#endif -#endif break; case 'M': /* qemu_st64 constraint */ ct->ct |= TCG_CT_REG; @@ -290,12 +278,10 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) tcg_regset_reset_reg(ct->u.regs, TCG_REG_R5); tcg_regset_reset_reg(ct->u.regs, TCG_REG_R6); tcg_regset_reset_reg(ct->u.regs, TCG_REG_R7); -#if defined(CONFIG_TCG_PASS_AREG0) tcg_regset_reset_reg(ct->u.regs, TCG_REG_R8); #ifdef TCG_TARGET_CALL_ALIGN_ARGS tcg_regset_reset_reg(ct->u.regs, TCG_REG_R9); #endif -#endif break; #else case 'L': @@ -541,7 +527,6 @@ static void tcg_out_call (TCGContext *s, tcg_target_long arg, int const_arg) #include "../../softmmu_defs.h" -#ifdef CONFIG_TCG_PASS_AREG0 /* helper signature: helper_ld_mmu(CPUState *env, target_ulong addr, int mmu_idx) */ static const void * const qemu_ld_helpers[4] = { @@ -559,25 +544,6 @@ static const void * const qemu_st_helpers[4] = { helper_stl_mmu, helper_stq_mmu, }; -#else -/* legacy helper signature: __ld_mmu(target_ulong addr, int - mmu_idx) */ -static void *qemu_ld_helpers[4] = { - __ldb_mmu, - __ldw_mmu, - __ldl_mmu, - __ldq_mmu, -}; - -/* legacy helper signature: __ld_mmu(target_ulong addr, int - mmu_idx) */ -static void *qemu_st_helpers[4] = { - __stb_mmu, - __stw_mmu, - __stl_mmu, - __stq_mmu, -}; -#endif #endif static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc) @@ -647,9 +613,7 @@ static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc) /* slow path */ ir = 3; -#ifdef CONFIG_TCG_PASS_AREG0 tcg_out_mov (s, TCG_TYPE_I32, ir++, TCG_AREG0); -#endif #if TARGET_LONG_BITS == 32 tcg_out_mov (s, TCG_TYPE_I32, ir++, addr_reg); #else @@ -849,9 +813,7 @@ static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc) /* slow path */ ir = 3; -#ifdef CONFIG_TCG_PASS_AREG0 tcg_out_mov (s, TCG_TYPE_I32, ir++, TCG_AREG0); -#endif #if TARGET_LONG_BITS == 32 tcg_out_mov (s, TCG_TYPE_I32, ir++, addr_reg); #else |