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author | Marcelo Tosatti <mtosatti@redhat.com> | 2012-10-11 05:00:35 -0300 |
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committer | Marcelo Tosatti <mtosatti@redhat.com> | 2012-10-11 05:00:35 -0300 |
commit | 6b852ae04e3aa1adfeac5a62d6ab71870bcc7c5d (patch) | |
tree | cdf94fdf09a6b4abecff647784d82bc1ad1758c5 /tcg/i386/tcg-target.h | |
parent | 8ed1d2756d3347c2b021748d8c272ff650f57dd0 (diff) | |
parent | f430694188293f99a316bfa375b7cc17d23a06ed (diff) |
Merge commit 'f430694188293f99a316bfa375b7cc17d23a06ed' into upstream-merge
* commit 'f430694188293f99a316bfa375b7cc17d23a06ed': (248 commits)
add pc-1.3 machine type
Cleanup unused global var qemu_system_powerdown
target-sparc: use notifier for signaling guest system_powerdown command
target-arm: use notifier for signaling guest system_powerdown command
acpi: use notifier for signaling guest system_powerdown command
Introduce powerdown_notifiers
tcg/i386: fix build with -march < i686
tcg: Streamline movcond_i64 using movcond_i32
tcg: Streamline movcond_i64 using 32-bit arithmetic
tcg: Sanity check goto_tb input
tcg: Sanity check deposit inputs
tcg: Add tcg_debug_assert
tcg: Implement concat*_i64 with deposit_i64
tcg: Emit XORI as NOT for appropriate constants
tcg: Optimize initial inputs for ori_i64
tcg: Emit ANDI as EXTU for appropriate constants
tcg: Adjust descriptions of *cond opcodes
tcg/mips: fix MIPS32(R2) detection
block: remove keep_read_only flag from BlockDriverState struct
block: convert bdrv_commit() to use bdrv_reopen()
...
Conflicts:
hw/pc_piix.c
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Diffstat (limited to 'tcg/i386/tcg-target.h')
-rw-r--r-- | tcg/i386/tcg-target.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index 8be42f3cc..ace63ba37 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -67,7 +67,11 @@ typedef enum { /* used for function call generation */ #define TCG_REG_CALL_STACK TCG_REG_ESP #define TCG_TARGET_STACK_ALIGN 16 +#if defined(_WIN64) +#define TCG_TARGET_CALL_STACK_OFFSET 32 +#else #define TCG_TARGET_CALL_STACK_OFFSET 0 +#endif /* optional instructions */ #define TCG_TARGET_HAS_div2_i32 1 @@ -86,6 +90,12 @@ typedef enum { #define TCG_TARGET_HAS_nand_i32 0 #define TCG_TARGET_HAS_nor_i32 0 #define TCG_TARGET_HAS_deposit_i32 1 +#if defined(__x86_64__) || defined(__i686__) +/* Use cmov only if the compiler is already doing so. */ +#define TCG_TARGET_HAS_movcond_i32 1 +#else +#define TCG_TARGET_HAS_movcond_i32 0 +#endif #if TCG_TARGET_REG_BITS == 64 #define TCG_TARGET_HAS_div2_i64 1 @@ -107,6 +117,7 @@ typedef enum { #define TCG_TARGET_HAS_nand_i64 0 #define TCG_TARGET_HAS_nor_i64 0 #define TCG_TARGET_HAS_deposit_i64 1 +#define TCG_TARGET_HAS_movcond_i64 1 #endif #define TCG_TARGET_deposit_i32_valid(ofs, len) \ |