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| author |   Marcelo Tosatti <mtosatti@redhat.com> | 2012-10-11 05:00:35 -0300 |
|---|---|---|
| committer | Marcelo Tosatti <mtosatti@redhat.com> | 2012-10-11 05:00:35 -0300 |
| commit | 6b852ae04e3aa1adfeac5a62d6ab71870bcc7c5d (patch) | |
| tree | cdf94fdf09a6b4abecff647784d82bc1ad1758c5 /target-xtensa/cpu.h | |
| parent | 8ed1d2756d3347c2b021748d8c272ff650f57dd0 (diff) | |
| parent | f430694188293f99a316bfa375b7cc17d23a06ed (diff) | |
Merge commit 'f430694188293f99a316bfa375b7cc17d23a06ed' into upstream-merge
* commit 'f430694188293f99a316bfa375b7cc17d23a06ed': (248 commits)
add pc-1.3 machine type
Cleanup unused global var qemu_system_powerdown
target-sparc: use notifier for signaling guest system_powerdown command
target-arm: use notifier for signaling guest system_powerdown command
acpi: use notifier for signaling guest system_powerdown command
Introduce powerdown_notifiers
tcg/i386: fix build with -march < i686
tcg: Streamline movcond_i64 using movcond_i32
tcg: Streamline movcond_i64 using 32-bit arithmetic
tcg: Sanity check goto_tb input
tcg: Sanity check deposit inputs
tcg: Add tcg_debug_assert
tcg: Implement concat*_i64 with deposit_i64
tcg: Emit XORI as NOT for appropriate constants
tcg: Optimize initial inputs for ori_i64
tcg: Emit ANDI as EXTU for appropriate constants
tcg: Adjust descriptions of *cond opcodes
tcg/mips: fix MIPS32(R2) detection
block: remove keep_read_only flag from BlockDriverState struct
block: convert bdrv_commit() to use bdrv_reopen()
...
Conflicts:
hw/pc_piix.c
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Diffstat (limited to 'target-xtensa/cpu.h')
| -rw-r--r-- | target-xtensa/cpu.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index 177094ae9..7348277ed 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -36,6 +36,7 @@ #include "config.h" #include "qemu-common.h" #include "cpu-defs.h" +#include "fpu/softfloat.h" #define TARGET_HAS_ICE 1 @@ -325,6 +326,8 @@ typedef struct CPUXtensaState { uint32_t sregs[256]; uint32_t uregs[256]; uint32_t phys_regs[MAX_NAREG]; + float32 fregs[16]; + float_status fp_status; xtensa_tlb_entry itlb[7][MAX_TLB_WAY_SIZE]; xtensa_tlb_entry dtlb[10][MAX_TLB_WAY_SIZE]; @@ -465,6 +468,8 @@ static inline int cpu_mmu_index(CPUXtensaState *env) #define XTENSA_TBFLAG_LITBASE 0x8 #define XTENSA_TBFLAG_DEBUG 0x10 #define XTENSA_TBFLAG_ICOUNT 0x20 +#define XTENSA_TBFLAG_CPENABLE_MASK 0x3fc0 +#define XTENSA_TBFLAG_CPENABLE_SHIFT 6 static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, target_ulong *pc, target_ulong *cs_base, int *flags) @@ -488,6 +493,9 @@ static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, target_ulong *pc, *flags |= XTENSA_TBFLAG_ICOUNT; } } + if (xtensa_option_enabled(env->config, XTENSA_OPTION_COPROCESSOR)) { + *flags |= env->sregs[CPENABLE] << XTENSA_TBFLAG_CPENABLE_SHIFT; + } } #include "cpu-all.h" |