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authorMarcelo Tosatti <mtosatti@redhat.com>2012-08-31 12:43:17 -0300
committerMarcelo Tosatti <mtosatti@redhat.com>2012-08-31 12:43:17 -0300
commit1cc707b10567b0ebf2670e39f4a3c01da664fd6a (patch)
tree16cdc115c50e38a550915ca1ca2a014abce4d569 /target-i386/translate.c
parent352183cdb01761ba813576b3bc559947cbccbae8 (diff)
parent01fd4b8e9e28b92f124556a5889167820c52635f (diff)
Merge branch 'upstream-merge'qemu-kvm-1.2.0-rc2
* upstream-merge: (47 commits) w32: Fix broken build Update version for 1.2.0-rc2 scsi-disk: Fix typo (uint32 -> uint32_t) msix: make [un]use vectors on reset/load optional kvm: get/set PV EOI MSR linux-headers: update to 3.6-rc3 target-i386: disable pv eoi to fix migration across QEMU versions reset PMBA and PMREGMISC PIIX4 registers. qemu-ga: Fix null pointer passed to unlink in failure branch memory: Fix copy&paste mistake in memory_region_iorange_write ivshmem: remove redundant ioeventfd configuration hw/arm_gic.c: Define .class_size in arm_gic_info TypeInfo tcg/mips: fix broken CONFIG_TCG_PASS_AREG0 code Update OpenBIOS PPC image target-ppc: fix altivec instructions audio/winwave: previous audio buffer should be flushed iscsi: Set number of blocks to 0 for blank CDROM devices scsi: more fixes to properties for passthrough devices esp: support 24-bit DMA megasas: Add 'hba_serial' property ... Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Diffstat (limited to 'target-i386/translate.c')
-rw-r--r--target-i386/translate.c14
1 files changed, 10 insertions, 4 deletions
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 7ab2ccb19..eb0cabcf1 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -7551,8 +7551,11 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
} else {
modrm = cpu_ldub_code(cpu_single_env, s->pc++);
- if ((modrm & 0xc0) != 0xc0)
- goto illegal_op;
+ /* Ignore the mod bits (assume (modrm&0xc0)==0xc0).
+ * AMD documentation (24594.pdf) and testing of
+ * intel 386 and 486 processors all show that the mod bits
+ * are assumed to be 1's, regardless of actual values.
+ */
rm = (modrm & 7) | REX_B(s);
reg = ((modrm >> 3) & 7) | rex_r;
if (CODE64(s))
@@ -7594,8 +7597,11 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
} else {
modrm = cpu_ldub_code(cpu_single_env, s->pc++);
- if ((modrm & 0xc0) != 0xc0)
- goto illegal_op;
+ /* Ignore the mod bits (assume (modrm&0xc0)==0xc0).
+ * AMD documentation (24594.pdf) and testing of
+ * intel 386 and 486 processors all show that the mod bits
+ * are assumed to be 1's, regardless of actual values.
+ */
rm = (modrm & 7) | REX_B(s);
reg = ((modrm >> 3) & 7) | rex_r;
if (CODE64(s))