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author | Marcelo Tosatti <mtosatti@redhat.com> | 2012-10-11 05:00:35 -0300 |
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committer | Marcelo Tosatti <mtosatti@redhat.com> | 2012-10-11 05:00:35 -0300 |
commit | 6b852ae04e3aa1adfeac5a62d6ab71870bcc7c5d (patch) | |
tree | cdf94fdf09a6b4abecff647784d82bc1ad1758c5 /target-i386/cpu.h | |
parent | 8ed1d2756d3347c2b021748d8c272ff650f57dd0 (diff) | |
parent | f430694188293f99a316bfa375b7cc17d23a06ed (diff) |
Merge commit 'f430694188293f99a316bfa375b7cc17d23a06ed' into upstream-merge
* commit 'f430694188293f99a316bfa375b7cc17d23a06ed': (248 commits)
add pc-1.3 machine type
Cleanup unused global var qemu_system_powerdown
target-sparc: use notifier for signaling guest system_powerdown command
target-arm: use notifier for signaling guest system_powerdown command
acpi: use notifier for signaling guest system_powerdown command
Introduce powerdown_notifiers
tcg/i386: fix build with -march < i686
tcg: Streamline movcond_i64 using movcond_i32
tcg: Streamline movcond_i64 using 32-bit arithmetic
tcg: Sanity check goto_tb input
tcg: Sanity check deposit inputs
tcg: Add tcg_debug_assert
tcg: Implement concat*_i64 with deposit_i64
tcg: Emit XORI as NOT for appropriate constants
tcg: Optimize initial inputs for ori_i64
tcg: Emit ANDI as EXTU for appropriate constants
tcg: Adjust descriptions of *cond opcodes
tcg/mips: fix MIPS32(R2) detection
block: remove keep_read_only flag from BlockDriverState struct
block: convert bdrv_commit() to use bdrv_reopen()
...
Conflicts:
hw/pc_piix.c
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Diffstat (limited to 'target-i386/cpu.h')
-rw-r--r-- | target-i386/cpu.h | 26 |
1 files changed, 24 insertions, 2 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 3c57d8b6b..f78535bcc 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -382,6 +382,7 @@ #define CPUID_PBE (1 << 31) #define CPUID_EXT_SSE3 (1 << 0) +#define CPUID_EXT_PCLMULQDQ (1 << 1) #define CPUID_EXT_DTES64 (1 << 2) #define CPUID_EXT_MONITOR (1 << 3) #define CPUID_EXT_DSCPL (1 << 4) @@ -401,14 +402,33 @@ #define CPUID_EXT_MOVBE (1 << 22) #define CPUID_EXT_POPCNT (1 << 23) #define CPUID_EXT_TSC_DEADLINE_TIMER (1 << 24) +#define CPUID_EXT_AES (1 << 25) #define CPUID_EXT_XSAVE (1 << 26) #define CPUID_EXT_OSXSAVE (1 << 27) +#define CPUID_EXT_AVX (1 << 28) #define CPUID_EXT_HYPERVISOR (1 << 31) +#define CPUID_EXT2_FPU (1 << 0) +#define CPUID_EXT2_DE (1 << 2) +#define CPUID_EXT2_PSE (1 << 3) +#define CPUID_EXT2_TSC (1 << 4) +#define CPUID_EXT2_MSR (1 << 5) +#define CPUID_EXT2_PAE (1 << 6) +#define CPUID_EXT2_MCE (1 << 7) +#define CPUID_EXT2_CX8 (1 << 8) +#define CPUID_EXT2_APIC (1 << 9) #define CPUID_EXT2_SYSCALL (1 << 11) +#define CPUID_EXT2_MTRR (1 << 12) +#define CPUID_EXT2_PGE (1 << 13) +#define CPUID_EXT2_MCA (1 << 14) +#define CPUID_EXT2_CMOV (1 << 15) +#define CPUID_EXT2_PAT (1 << 16) +#define CPUID_EXT2_PSE36 (1 << 17) #define CPUID_EXT2_MP (1 << 19) #define CPUID_EXT2_NX (1 << 20) #define CPUID_EXT2_MMXEXT (1 << 22) +#define CPUID_EXT2_MMX (1 << 23) +#define CPUID_EXT2_FXSR (1 << 24) #define CPUID_EXT2_FFXSR (1 << 25) #define CPUID_EXT2_PDPE1GB (1 << 26) #define CPUID_EXT2_RDTSCP (1 << 27) @@ -427,7 +447,9 @@ #define CPUID_EXT3_3DNOWPREFETCH (1 << 8) #define CPUID_EXT3_OSVW (1 << 9) #define CPUID_EXT3_IBS (1 << 10) +#define CPUID_EXT3_XOP (1 << 11) #define CPUID_EXT3_SKINIT (1 << 12) +#define CPUID_EXT3_FMA4 (1 << 16) #define CPUID_SVM_NPT (1 << 0) #define CPUID_SVM_LBRV (1 << 1) @@ -792,7 +814,7 @@ typedef struct CPUX86State { X86CPU *cpu_x86_init(const char *cpu_model); int cpu_x86_exec(CPUX86State *s); -void x86_cpu_list (FILE *f, fprintf_function cpu_fprintf, const char *optarg); +void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf); void x86_cpudef_setup(void); int cpu_x86_support_mca_broadcast(CPUX86State *env); @@ -977,7 +999,7 @@ static inline CPUX86State *cpu_init(const char *cpu_model) #define cpu_exec cpu_x86_exec #define cpu_gen_code cpu_x86_gen_code #define cpu_signal_handler cpu_x86_signal_handler -#define cpu_list_id x86_cpu_list +#define cpu_list x86_cpu_list #define cpudef_setup x86_cpudef_setup #define CPU_SAVE_VERSION 12 |