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authorMarcelo Tosatti <mtosatti@redhat.com>2012-10-11 04:55:31 -0300
committerMarcelo Tosatti <mtosatti@redhat.com>2012-10-11 04:55:31 -0300
commit8ed1d2756d3347c2b021748d8c272ff650f57dd0 (patch)
treeaf8f50be8e69de7b4fce9d9ec8d8ef144acf3b08 /target-arm/cpu.h
parent6b414d9fb86527118f3ddb81a1d1a684b3548a9d (diff)
parent121afa9e0c02617c2a774996512e4f85f3e93da8 (diff)
Merge commit '121afa9e0c02617c2a774996512e4f85f3e93da8' into upstream-merge
* commit '121afa9e0c02617c2a774996512e4f85f3e93da8': (85 commits) Revert "Add ability to disable build of all targets" cpu_physical_memory_write_rom() needs to do TB invalidates qemu-char: BUGFIX, don't call FD_ISSET with negative fd Revert 455aa1e08 and c3767ed0eb pc: Drop practically unused BOCHS BIOS debug ports add -machine mem-merge=on|off option Remove unused CONFIG_TCG_PASS_AREG0 and dead code target-mips: switch to AREG0 free mode target-sh4: switch to AREG0 free mode target-cris: Switch to AREG0 free mode target-cris: Avoid AREG0 for helpers target-microblaze: switch to AREG0 free mode target-arm: final conversion to AREG0 free mode target-arm: convert remaining helpers target-arm: convert void helpers target-unicore32: switch to AREG0 free mode target-m68k: avoid using cpu_single_env target-m68k: switch to AREG0 free mode target-lm32: switch to AREG0 free mode target-s390x: avoid cpu_single_env ... Conflicts: configure Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Diffstat (limited to 'target-arm/cpu.h')
-rw-r--r--target-arm/cpu.h10
1 files changed, 6 insertions, 4 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index d7f93d98f..7fac94f81 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -734,9 +734,10 @@ static inline void cpu_pc_from_tb(CPUARMState *env, TranslationBlock *tb)
}
/* Load an instruction and return it in the standard little-endian order */
-static inline uint32_t arm_ldl_code(uint32_t addr, bool do_swap)
+static inline uint32_t arm_ldl_code(CPUARMState *env, uint32_t addr,
+ bool do_swap)
{
- uint32_t insn = ldl_code(addr);
+ uint32_t insn = cpu_ldl_code(env, addr);
if (do_swap) {
return bswap32(insn);
}
@@ -744,9 +745,10 @@ static inline uint32_t arm_ldl_code(uint32_t addr, bool do_swap)
}
/* Ditto, for a halfword (Thumb) instruction */
-static inline uint16_t arm_lduw_code(uint32_t addr, bool do_swap)
+static inline uint16_t arm_lduw_code(CPUARMState *env, uint32_t addr,
+ bool do_swap)
{
- uint16_t insn = lduw_code(addr);
+ uint16_t insn = cpu_lduw_code(env, addr);
if (do_swap) {
return bswap16(insn);
}