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authorMarcelo Tosatti <mtosatti@redhat.com>2012-10-11 04:55:31 -0300
committerMarcelo Tosatti <mtosatti@redhat.com>2012-10-11 04:55:31 -0300
commit8ed1d2756d3347c2b021748d8c272ff650f57dd0 (patch)
treeaf8f50be8e69de7b4fce9d9ec8d8ef144acf3b08 /softmmu_defs.h
parent6b414d9fb86527118f3ddb81a1d1a684b3548a9d (diff)
parent121afa9e0c02617c2a774996512e4f85f3e93da8 (diff)
Merge commit '121afa9e0c02617c2a774996512e4f85f3e93da8' into upstream-merge
* commit '121afa9e0c02617c2a774996512e4f85f3e93da8': (85 commits) Revert "Add ability to disable build of all targets" cpu_physical_memory_write_rom() needs to do TB invalidates qemu-char: BUGFIX, don't call FD_ISSET with negative fd Revert 455aa1e08 and c3767ed0eb pc: Drop practically unused BOCHS BIOS debug ports add -machine mem-merge=on|off option Remove unused CONFIG_TCG_PASS_AREG0 and dead code target-mips: switch to AREG0 free mode target-sh4: switch to AREG0 free mode target-cris: Switch to AREG0 free mode target-cris: Avoid AREG0 for helpers target-microblaze: switch to AREG0 free mode target-arm: final conversion to AREG0 free mode target-arm: convert remaining helpers target-arm: convert void helpers target-unicore32: switch to AREG0 free mode target-m68k: avoid using cpu_single_env target-m68k: switch to AREG0 free mode target-lm32: switch to AREG0 free mode target-s390x: avoid cpu_single_env ... Conflicts: configure Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Diffstat (limited to 'softmmu_defs.h')
-rw-r--r--softmmu_defs.h21
1 files changed, 0 insertions, 21 deletions
diff --git a/softmmu_defs.h b/softmmu_defs.h
index 8d59f9d4f..1f25e33ce 100644
--- a/softmmu_defs.h
+++ b/softmmu_defs.h
@@ -9,25 +9,6 @@
#ifndef SOFTMMU_DEFS_H
#define SOFTMMU_DEFS_H
-#ifndef CONFIG_TCG_PASS_AREG0
-uint8_t __ldb_mmu(target_ulong addr, int mmu_idx);
-void __stb_mmu(target_ulong addr, uint8_t val, int mmu_idx);
-uint16_t __ldw_mmu(target_ulong addr, int mmu_idx);
-void __stw_mmu(target_ulong addr, uint16_t val, int mmu_idx);
-uint32_t __ldl_mmu(target_ulong addr, int mmu_idx);
-void __stl_mmu(target_ulong addr, uint32_t val, int mmu_idx);
-uint64_t __ldq_mmu(target_ulong addr, int mmu_idx);
-void __stq_mmu(target_ulong addr, uint64_t val, int mmu_idx);
-
-uint8_t __ldb_cmmu(target_ulong addr, int mmu_idx);
-void __stb_cmmu(target_ulong addr, uint8_t val, int mmu_idx);
-uint16_t __ldw_cmmu(target_ulong addr, int mmu_idx);
-void __stw_cmmu(target_ulong addr, uint16_t val, int mmu_idx);
-uint32_t __ldl_cmmu(target_ulong addr, int mmu_idx);
-void __stl_cmmu(target_ulong addr, uint32_t val, int mmu_idx);
-uint64_t __ldq_cmmu(target_ulong addr, int mmu_idx);
-void __stq_cmmu(target_ulong addr, uint64_t val, int mmu_idx);
-#else
uint8_t helper_ldb_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
void helper_stb_mmu(CPUArchState *env, target_ulong addr, uint8_t val,
int mmu_idx);
@@ -54,5 +35,3 @@ uint64_t helper_ldq_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
void helper_stq_cmmu(CPUArchState *env, target_ulong addr, uint64_t val,
int mmu_idx);
#endif
-
-#endif