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authorAvi Kivity <avi@redhat.com>2012-09-09 16:21:39 +0300
committerAvi Kivity <avi@redhat.com>2012-09-09 16:21:39 +0300
commit3505aa6bec1a3bb474d81c495515b44654659a38 (patch)
treebf0f5f9e1a76159752047cdb239c62cbbd1f2ace /hw/acpi_piix4.c
parent7fa12eb15f95c269f488fce4096093c96dbaffab (diff)
parent4ce5bc2dd1914a706725186c6563e8f92eedfc84 (diff)
Merge tag 'v1.1.2' into stable-1.1qemu-kvm-1.1.2stable-1.1
* tag 'v1.1.2': (74 commits) update VERSION for 1.1.2 console: bounds check whenever changing the cursor due to an escape code qemu-timer: properly arm alarm timer for timers set by device initialization target-xtensa: return ENOSYS for unimplemented simcalls target-xtensa: fix big-endian BBS/BBC implementation ehci: Fix NULL ptr deref when unplugging an USB dev with an iso stream active msix: make [un]use vectors on reset/load optional reset PMBA and PMREGMISC PIIX4 registers. qemu_rearm_alarm_timer: do not call rearm if the next deadline is INT64_MAX qemu-ga: Fix null pointer passed to unlink in failure branch memory: Fix copy&paste mistake in memory_region_iorange_write ivshmem: remove redundant ioeventfd configuration hw/arm_gic.c: Define .class_size in arm_gic_info TypeInfo tcg/mips: fix broken CONFIG_TCG_PASS_AREG0 code audio/winwave: previous audio buffer should be flushed target-mips: allow microMIPS SWP and SDP to have RD equal to BASE target-mips: add privilege level check to several Cop0 instructions mips-linux-user: Always support rdhwr. target-mips: Streamline indexed cp1 memory addressing. Fix order of CVT.PS.S operands ... Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'hw/acpi_piix4.c')
-rw-r--r--hw/acpi_piix4.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c
index 1fbc3149b..106493537 100644
--- a/hw/acpi_piix4.c
+++ b/hw/acpi_piix4.c
@@ -305,7 +305,6 @@ static void acpi_piix_eject_slot(PIIX4PMState *s, unsigned slots)
if (pc->no_hotplug) {
slot_free = false;
} else {
- object_unparent(OBJECT(dev));
qdev_free(qdev);
}
}
@@ -352,6 +351,9 @@ static void piix4_reset(void *opaque)
pci_conf[0x5a] = 0;
pci_conf[0x5b] = 0;
+ pci_conf[0x40] = 0x01; /* PM io base read only bit */
+ pci_conf[0x80] = 0;
+
if (s->kvm_enabled) {
/* Mark SMM as already inited (until KVM supports SMM). */
pci_conf[0x5B] = 0x02;
@@ -396,8 +398,6 @@ static int piix4_pm_initfn(PCIDevice *dev)
pci_conf[0x09] = 0x00;
pci_conf[0x3d] = 0x01; // interrupt pin 1
- pci_conf[0x40] = 0x01; /* PM io base read only bit */
-
/* APM */
apm_init(&s->apm, apm_ctrl_changed, s);