diff options
Diffstat (limited to 'target-sh4/translate.c')
| -rw-r--r-- | target-sh4/translate.c | 50 |
1 files changed, 25 insertions, 25 deletions
diff --git a/target-sh4/translate.c b/target-sh4/translate.c index dd0ee4be9..a337beb9e 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -103,47 +103,47 @@ static void sh4_translate_init(void) for (i = 0; i < 24; i++) cpu_gregs[i] = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, gregs[i]), + offsetof(CPUSH4State, gregs[i]), gregnames[i]); cpu_pc = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, pc), "PC"); + offsetof(CPUSH4State, pc), "PC"); cpu_sr = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, sr), "SR"); + offsetof(CPUSH4State, sr), "SR"); cpu_ssr = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, ssr), "SSR"); + offsetof(CPUSH4State, ssr), "SSR"); cpu_spc = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, spc), "SPC"); + offsetof(CPUSH4State, spc), "SPC"); cpu_gbr = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, gbr), "GBR"); + offsetof(CPUSH4State, gbr), "GBR"); cpu_vbr = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, vbr), "VBR"); + offsetof(CPUSH4State, vbr), "VBR"); cpu_sgr = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, sgr), "SGR"); + offsetof(CPUSH4State, sgr), "SGR"); cpu_dbr = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, dbr), "DBR"); + offsetof(CPUSH4State, dbr), "DBR"); cpu_mach = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, mach), "MACH"); + offsetof(CPUSH4State, mach), "MACH"); cpu_macl = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, macl), "MACL"); + offsetof(CPUSH4State, macl), "MACL"); cpu_pr = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, pr), "PR"); + offsetof(CPUSH4State, pr), "PR"); cpu_fpscr = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, fpscr), "FPSCR"); + offsetof(CPUSH4State, fpscr), "FPSCR"); cpu_fpul = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, fpul), "FPUL"); + offsetof(CPUSH4State, fpul), "FPUL"); cpu_flags = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, flags), "_flags_"); + offsetof(CPUSH4State, flags), "_flags_"); cpu_delayed_pc = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, delayed_pc), + offsetof(CPUSH4State, delayed_pc), "_delayed_pc_"); cpu_ldst = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, ldst), "_ldst_"); + offsetof(CPUSH4State, ldst), "_ldst_"); for (i = 0; i < 32; i++) cpu_fregs[i] = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, fregs[i]), + offsetof(CPUSH4State, fregs[i]), fregnames[i]); /* register helpers */ @@ -153,7 +153,7 @@ static void sh4_translate_init(void) done_init = 1; } -void cpu_dump_state(CPUState * env, FILE * f, +void cpu_dump_state(CPUSH4State * env, FILE * f, int (*cpu_fprintf) (FILE * f, const char *fmt, ...), int flags) { @@ -178,7 +178,7 @@ void cpu_dump_state(CPUState * env, FILE * f, } } -void cpu_reset(CPUSH4State * env) +void cpu_state_reset(CPUSH4State *env) { if (qemu_loglevel_mask(CPU_LOG_RESET)) { qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); @@ -279,7 +279,7 @@ CPUSH4State *cpu_sh4_init(const char *cpu_model) env->movcal_backup_tail = &(env->movcal_backup); sh4_translate_init(); env->cpu_model_str = cpu_model; - cpu_reset(env); + cpu_state_reset(env); cpu_register(env, def); qemu_init_vcpu(env); return env; @@ -1918,7 +1918,7 @@ static void decode_opc(DisasContext * ctx) } static inline void -gen_intermediate_code_internal(CPUState * env, TranslationBlock * tb, +gen_intermediate_code_internal(CPUSH4State * env, TranslationBlock * tb, int search_pc) { DisasContext ctx; @@ -2044,17 +2044,17 @@ gen_intermediate_code_internal(CPUState * env, TranslationBlock * tb, #endif } -void gen_intermediate_code(CPUState * env, struct TranslationBlock *tb) +void gen_intermediate_code(CPUSH4State * env, struct TranslationBlock *tb) { gen_intermediate_code_internal(env, tb, 0); } -void gen_intermediate_code_pc(CPUState * env, struct TranslationBlock *tb) +void gen_intermediate_code_pc(CPUSH4State * env, struct TranslationBlock *tb) { gen_intermediate_code_internal(env, tb, 1); } -void restore_state_to_opc(CPUState *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPUSH4State *env, TranslationBlock *tb, int pc_pos) { env->pc = gen_opc_pc[pc_pos]; env->flags = gen_opc_hflags[pc_pos]; |