diff options
Diffstat (limited to 'target-s390x/helper.c')
| -rw-r--r-- | target-s390x/helper.c | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/target-s390x/helper.c b/target-s390x/helper.c index c0ec8908a..44d50484d 100644 --- a/target-s390x/helper.c +++ b/target-s390x/helper.c @@ -53,7 +53,7 @@ #ifndef CONFIG_USER_ONLY static void s390x_tod_timer(void *opaque) { - CPUState *env = opaque; + CPUS390XState *env = opaque; env->pending_int |= INTERRUPT_TOD; cpu_interrupt(env, CPU_INTERRUPT_HARD); @@ -61,7 +61,7 @@ static void s390x_tod_timer(void *opaque) static void s390x_cpu_timer(void *opaque) { - CPUState *env = opaque; + CPUS390XState *env = opaque; env->pending_int |= INTERRUPT_CPUTIMER; cpu_interrupt(env, CPU_INTERRUPT_HARD); @@ -95,19 +95,19 @@ CPUS390XState *cpu_s390x_init(const char *cpu_model) env->cpu_model_str = cpu_model; env->cpu_num = cpu_num++; env->ext_index = -1; - cpu_reset(env); + cpu_state_reset(env); qemu_init_vcpu(env); return env; } #if defined(CONFIG_USER_ONLY) -void do_interrupt (CPUState *env) +void do_interrupt (CPUS390XState *env) { env->exception_index = -1; } -int cpu_s390x_handle_mmu_fault (CPUState *env, target_ulong address, int rw, +int cpu_s390x_handle_mmu_fault (CPUS390XState *env, target_ulong address, int rw, int mmu_idx) { /* fprintf(stderr,"%s: address 0x%lx rw %d mmu_idx %d\n", @@ -119,7 +119,7 @@ int cpu_s390x_handle_mmu_fault (CPUState *env, target_ulong address, int rw, #endif /* CONFIG_USER_ONLY */ -void cpu_reset(CPUS390XState *env) +void cpu_state_reset(CPUS390XState *env) { if (qemu_loglevel_mask(CPU_LOG_RESET)) { qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); @@ -135,14 +135,14 @@ void cpu_reset(CPUS390XState *env) #ifndef CONFIG_USER_ONLY /* Ensure to exit the TB after this call! */ -static void trigger_pgm_exception(CPUState *env, uint32_t code, uint32_t ilc) +static void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilc) { env->exception_index = EXCP_PGM; env->int_pgm_code = code; env->int_pgm_ilc = ilc; } -static int trans_bits(CPUState *env, uint64_t mode) +static int trans_bits(CPUS390XState *env, uint64_t mode) { int bits = 0; @@ -164,7 +164,7 @@ static int trans_bits(CPUState *env, uint64_t mode) return bits; } -static void trigger_prot_fault(CPUState *env, target_ulong vaddr, uint64_t mode) +static void trigger_prot_fault(CPUS390XState *env, target_ulong vaddr, uint64_t mode) { int ilc = ILC_LATER_INC_2; int bits = trans_bits(env, mode) | 4; @@ -175,7 +175,7 @@ static void trigger_prot_fault(CPUState *env, target_ulong vaddr, uint64_t mode) trigger_pgm_exception(env, PGM_PROTECTION, ilc); } -static void trigger_page_fault(CPUState *env, target_ulong vaddr, uint32_t type, +static void trigger_page_fault(CPUS390XState *env, target_ulong vaddr, uint32_t type, uint64_t asc, int rw) { int ilc = ILC_LATER; @@ -192,7 +192,7 @@ static void trigger_page_fault(CPUState *env, target_ulong vaddr, uint32_t type, trigger_pgm_exception(env, type, ilc); } -static int mmu_translate_asce(CPUState *env, target_ulong vaddr, uint64_t asc, +static int mmu_translate_asce(CPUS390XState *env, target_ulong vaddr, uint64_t asc, uint64_t asce, int level, target_ulong *raddr, int *flags, int rw) { @@ -274,7 +274,7 @@ static int mmu_translate_asce(CPUState *env, target_ulong vaddr, uint64_t asc, return 0; } -static int mmu_translate_asc(CPUState *env, target_ulong vaddr, uint64_t asc, +static int mmu_translate_asc(CPUS390XState *env, target_ulong vaddr, uint64_t asc, target_ulong *raddr, int *flags, int rw) { uint64_t asce = 0; @@ -343,7 +343,7 @@ static int mmu_translate_asc(CPUState *env, target_ulong vaddr, uint64_t asc, return r; } -int mmu_translate(CPUState *env, target_ulong vaddr, int rw, uint64_t asc, +int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, target_ulong *raddr, int *flags) { int r = -1; @@ -404,7 +404,7 @@ out: return r; } -int cpu_s390x_handle_mmu_fault (CPUState *env, target_ulong _vaddr, int rw, +int cpu_s390x_handle_mmu_fault (CPUS390XState *env, target_ulong _vaddr, int rw, int mmu_idx) { uint64_t asc = env->psw.mask & PSW_MASK_ASC; @@ -444,7 +444,7 @@ int cpu_s390x_handle_mmu_fault (CPUState *env, target_ulong _vaddr, int rw, return 0; } -target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong vaddr) +target_phys_addr_t cpu_get_phys_page_debug(CPUS390XState *env, target_ulong vaddr) { target_ulong raddr; int prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; @@ -462,7 +462,7 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong vaddr) return raddr; } -void load_psw(CPUState *env, uint64_t mask, uint64_t addr) +void load_psw(CPUS390XState *env, uint64_t mask, uint64_t addr) { if (mask & PSW_MASK_WAIT) { if (!(mask & (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK))) { @@ -481,7 +481,7 @@ void load_psw(CPUState *env, uint64_t mask, uint64_t addr) env->cc_op = (mask >> 13) & 3; } -static uint64_t get_psw_mask(CPUState *env) +static uint64_t get_psw_mask(CPUS390XState *env) { uint64_t r = env->psw.mask; @@ -494,7 +494,7 @@ static uint64_t get_psw_mask(CPUState *env) return r; } -static void do_svc_interrupt(CPUState *env) +static void do_svc_interrupt(CPUS390XState *env) { uint64_t mask, addr; LowCore *lowcore; @@ -514,7 +514,7 @@ static void do_svc_interrupt(CPUState *env) load_psw(env, mask, addr); } -static void do_program_interrupt(CPUState *env) +static void do_program_interrupt(CPUS390XState *env) { uint64_t mask, addr; LowCore *lowcore; @@ -557,7 +557,7 @@ static void do_program_interrupt(CPUState *env) #define VIRTIO_SUBCODE_64 0x0D00 -static void do_ext_interrupt(CPUState *env) +static void do_ext_interrupt(CPUS390XState *env) { uint64_t mask, addr; LowCore *lowcore; @@ -597,7 +597,7 @@ static void do_ext_interrupt(CPUState *env) load_psw(env, mask, addr); } -void do_interrupt (CPUState *env) +void do_interrupt (CPUS390XState *env) { qemu_log("%s: %d at pc=%" PRIx64 "\n", __FUNCTION__, env->exception_index, env->psw.addr); |