diff options
| author |   Marcelo Tosatti <mtosatti@redhat.com> | 2012-10-11 05:27:15 -0300 |
|---|---|---|
| committer | Marcelo Tosatti <mtosatti@redhat.com> | 2012-10-11 05:27:15 -0300 |
| commit | 4d9367b76f71c6d938cf8201392abe4bfb1136cb (patch) | |
| tree | 93a31afc3151c19e4906aed6748e842d8431fb02 /target-arm/cpu.h | |
| parent | 6b414d9fb86527118f3ddb81a1d1a684b3548a9d (diff) | |
| parent | 8e65440d5f64435c003d32088757f702b86af9b4 (diff) | |
* upstream-merge: (575 commits)
ssi: Add slave autoconnect helper
MAINTAINERS: Added maintainerships for SSI
xilinx_zynq: Added SPI controllers + flashes
xilinx_spips: Xilinx Zynq SPI cntrlr device model
petalogix-ml605: added SPI controller with n25q128
xilinx_spi: Initial impl. of Xilinx SPI controller
m25p80: Initial implementation of SPI flash device
hw: Added generic FIFO API.
stellaris: Removed SSI mux
qdev: allow multiple qdev_init_gpio_in() calls
ssi: Added create_slave_no_init()
ssi: Implemented CS behaviour
ssi: Support for multiple attached devices
qemu-barrier: Fix compilation on i386 hosts
target-sparc: Optimize conditionals using SUBCC
target-sparc: Fall through from not-taken trap
target-sparc: Cleanup "global" temporary allocation
target-sparc: Use movcond for FMOV*R
target-sparc: Use movcond in mulscc
target-sparc: Move taddcctv and tsubcctv out of line
...
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Diffstat (limited to 'target-arm/cpu.h')
| -rw-r--r-- | target-arm/cpu.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index d7f93d98f..ff4de10f1 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -423,8 +423,6 @@ void armv7m_nvic_complete_irq(void *opaque, int irq); (((cp) << 16) | ((is64) << 15) | ((crn) << 11) | \ ((crm) << 7) | ((opc1) << 3) | (opc2)) -#define DECODE_CPREG_CRN(enc) (((enc) >> 7) & 0xf) - /* ARMCPRegInfo type field bits. If the SPECIAL bit is set this is a * special-behaviour cp reg and bits [15..8] indicate what behaviour * it has. Otherwise it is a simple cp reg, where CONST indicates that @@ -734,9 +732,10 @@ static inline void cpu_pc_from_tb(CPUARMState *env, TranslationBlock *tb) } /* Load an instruction and return it in the standard little-endian order */ -static inline uint32_t arm_ldl_code(uint32_t addr, bool do_swap) +static inline uint32_t arm_ldl_code(CPUARMState *env, uint32_t addr, + bool do_swap) { - uint32_t insn = ldl_code(addr); + uint32_t insn = cpu_ldl_code(env, addr); if (do_swap) { return bswap32(insn); } @@ -744,9 +743,10 @@ static inline uint32_t arm_ldl_code(uint32_t addr, bool do_swap) } /* Ditto, for a halfword (Thumb) instruction */ -static inline uint16_t arm_lduw_code(uint32_t addr, bool do_swap) +static inline uint16_t arm_lduw_code(CPUARMState *env, uint32_t addr, + bool do_swap) { - uint16_t insn = lduw_code(addr); + uint16_t insn = cpu_lduw_code(env, addr); if (do_swap) { return bswap16(insn); } |