diff options
author | Avi Kivity <avi@redhat.com> | 2011-11-27 13:41:53 +0200 |
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committer | Avi Kivity <avi@redhat.com> | 2011-11-27 13:41:53 +0200 |
commit | 360e6724867d825e3af6b27c1c54869719196636 (patch) | |
tree | 2c4365a5692f2b0e748c7329fa60c043e58e8559 | |
parent | 7e77ae149517feda42a5a5e28e2f76e892526f5c (diff) | |
parent | ae392c416c69a020226c768d9c3af08b29dd6d96 (diff) |
Merge commit 'ae392c416c69a020226c768d9c3af08b29dd6d96' into upstream-merge
* commit 'ae392c416c69a020226c768d9c3af08b29dd6d96':
msix: avoid mask updates if mask is unchanged
Conflicts:
hw/msix.c
Signed-off-by: Avi Kivity <avi@redhat.com>
-rw-r--r-- | hw/msix.c | 30 |
1 files changed, 20 insertions, 10 deletions
@@ -213,17 +213,25 @@ static void msix_clr_pending(PCIDevice *dev, int vector) *msix_pending_byte(dev, vector) &= ~msix_pending_mask(vector); } -static int msix_is_masked(PCIDevice *dev, int vector) +static bool msix_vector_masked(PCIDevice *dev, int vector, bool fmask) { - unsigned offset = - vector * PCI_MSIX_ENTRY_SIZE + PCI_MSIX_ENTRY_VECTOR_CTRL; - return dev->msix_function_masked || - dev->msix_table_page[offset] & PCI_MSIX_ENTRY_CTRL_MASKBIT; + unsigned offset = vector * PCI_MSIX_ENTRY_SIZE + PCI_MSIX_ENTRY_VECTOR_CTRL; + return fmask || dev->msix_table_page[offset] & PCI_MSIX_ENTRY_CTRL_MASKBIT; } -static void msix_handle_mask_update(PCIDevice *dev, int vector) +static bool msix_is_masked(PCIDevice *dev, int vector) { - if (!msix_is_masked(dev, vector) && msix_is_pending(dev, vector)) { + return msix_vector_masked(dev, vector, dev->msix_function_masked); +} + +static void msix_handle_mask_update(PCIDevice *dev, int vector, bool was_masked) +{ + bool is_masked = msix_is_masked(dev, vector); + if (is_masked == was_masked) { + return; + } + + if (!is_masked && msix_is_pending(dev, vector)) { msix_clr_pending(dev, vector); msix_notify(dev, vector); } @@ -261,7 +269,8 @@ void msix_write_config(PCIDevice *dev, uint32_t addr, } for (vector = 0; vector < dev->msix_entries_nr; ++vector) { - msix_handle_mask_update(dev, vector); + msix_handle_mask_update(dev, vector, + msix_vector_masked(dev, vector, was_masked)); } } @@ -271,13 +280,14 @@ static void msix_mmio_write(void *opaque, target_phys_addr_t addr, PCIDevice *dev = opaque; unsigned int offset = addr & (MSIX_PAGE_SIZE - 1) & ~0x3; int vector = offset / PCI_MSIX_ENTRY_SIZE; - int was_masked = msix_is_masked(dev, vector); + bool was_masked; /* MSI-X page includes a read-only PBA and a writeable Vector Control. */ if (vector >= dev->msix_entries_nr) { return; } + was_masked = msix_is_masked(dev, vector); pci_set_long(dev->msix_table_page + offset, val); if (kvm_enabled() && kvm_irqchip_in_kernel()) { kvm_msix_update(dev, vector, was_masked, msix_is_masked(dev, vector)); @@ -287,7 +297,7 @@ static void msix_mmio_write(void *opaque, target_phys_addr_t addr, msix_is_masked(dev, vector)); assert(r >= 0); } - msix_handle_mask_update(dev, vector); + msix_handle_mask_update(dev, vector, was_masked); } static const MemoryRegionOps msix_mmio_ops = { |