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Diffstat (limited to 'arch/arm/mach-imx/platsmp.c')
-rw-r--r--arch/arm/mach-imx/platsmp.c18
1 files changed, 14 insertions, 4 deletions
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index ab98c6fec9e..2ac43e1a2df 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -41,7 +41,7 @@ void __init imx_scu_map_io(void)
scu_base = IMX_IO_ADDRESS(base);
}
-void __cpuinit platform_secondary_init(unsigned int cpu)
+static void __cpuinit imx_secondary_init(unsigned int cpu)
{
/*
* if any interrupts are already enabled for the primary
@@ -51,7 +51,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
gic_secondary_init(0);
}
-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int __cpuinit imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
imx_set_cpu_jump(cpu, v7_secondary_startup);
imx_enable_cpu(cpu, true);
@@ -62,7 +62,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
* Initialise the CPU possible map early - this describes the CPUs
* which may be present or become present in the system.
*/
-void __init smp_init_cpus(void)
+static void __init imx_smp_init_cpus(void)
{
int i, ncores;
@@ -79,7 +79,17 @@ void imx_smp_prepare(void)
scu_enable(scu_base);
}
-void __init platform_smp_prepare_cpus(unsigned int max_cpus)
+static void __init imx_smp_prepare_cpus(unsigned int max_cpus)
{
imx_smp_prepare();
}
+
+struct smp_operations imx_smp_ops __initdata = {
+ .smp_init_cpus = imx_smp_init_cpus,
+ .smp_prepare_cpus = imx_smp_prepare_cpus,
+ .smp_secondary_init = imx_secondary_init,
+ .smp_boot_secondary = imx_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+ .cpu_die = imx_cpu_die,
+#endif
+};