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authorDaniel Mack <zonque@gmail.com>2012-09-27 09:19:34 +0000
committerDavid S. Miller <davem@davemloft.net>2012-10-01 17:09:07 -0400
commit342b7b741d76bc8aadeff844634348bb2a343d19 (patch)
treede68d9aea359b8f2a315a02896ca2457a7b627bb
parent8112ec3b8722680251aecdcc23dfd81aa7af6340 (diff)
net: ti cpsw ethernet: set IFCTL_A bit in MACCONTROL
For RMII/RGMII mode operation in 100Mbps, the CPSW needs to set the IFCTL_A bits in the MACCONTROL register. For all other PHY modes, this bit is unused, so setting it unconditionally shouldn't cause any trouble. Signed-off-by: Daniel Mack <zonque@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: David S. Miller <davem@davemloft.net> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/ethernet/ti/cpsw.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index 0cbc0e59252..df55e240374 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -386,6 +386,11 @@ static void _cpsw_adjust_link(struct cpsw_slave *slave,
mac_control |= BIT(7); /* GIGABITEN */
if (phy->duplex)
mac_control |= BIT(0); /* FULLDUPLEXEN */
+
+ /* set speed_in input in case RMII mode is used in 100Mbps */
+ if (phy->speed == 100)
+ mac_control |= BIT(15);
+
*link = true;
} else {
mac_control = 0;